diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index 256f1f0f9c2..5a1e23a3742 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -1885,13 +1885,13 @@ static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) { if (PrevElt > 0 && SrcElt < MaxElts) { if ((PrevElt == SrcElt - 1) || (PrevElt == MaxElts - 1 && SrcElt == 0)) { - rotamt = SrcElt-i; PrevElt = SrcElt; } else { rotate = false; } } else if (i == 0 || (PrevElt==0 && SrcElt==1)) { // First time or after a "wrap around" + rotamt = SrcElt-i; PrevElt = SrcElt; } else { // This isn't a rotation, takes elements from vector 2 diff --git a/test/CodeGen/CellSPU/rotate_ops.ll b/test/CodeGen/CellSPU/rotate_ops.ll index a504c002ae1..e1172089c70 100644 --- a/test/CodeGen/CellSPU/rotate_ops.ll +++ b/test/CodeGen/CellSPU/rotate_ops.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=cellspu -o %t1.s -; RUN: grep rot %t1.s | count 85 +; RUN: grep rot %t1.s | count 86 ; RUN: grep roth %t1.s | count 8 ; RUN: grep roti.*5 %t1.s | count 1 ; RUN: grep roti.*27 %t1.s | count 1 @@ -8,6 +8,7 @@ ; RUN grep rothi.*,.3 %t1.s | count 1 ; RUN: grep andhi %t1.s | count 4 ; RUN: grep shlhi %t1.s | count 4 +; RUN: cat %t1.s | FileCheck %s target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" @@ -158,3 +159,14 @@ define i8 @rotri8(i8 %A) { %D = or i8 %B, %C ; [#uses=1] ret i8 %D } + +define <2 x float> @test1(<4 x float> %param ) +{ +; CHECK: test1 +; CHECK: rotqbyi + %el = extractelement <4 x float> %param, i32 1 + %vec1 = insertelement <1 x float> undef, float %el, i32 0 + %rv = shufflevector <1 x float> %vec1, <1 x float> undef, <2 x i32> +; CHECK: bi $lr + ret <2 x float> %rv +}