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Add truncate and AssertZext result expansion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46926 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -209,6 +209,8 @@ private:
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void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_ZERO_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_AssertZext (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_TRUNCATE (SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi);
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void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
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@ -60,6 +60,8 @@ void DAGTypeLegalizer::ExpandResult(SDNode *N, unsigned ResNo) {
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case ISD::ANY_EXTEND: ExpandResult_ANY_EXTEND(N, Lo, Hi); break;
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case ISD::ZERO_EXTEND: ExpandResult_ZERO_EXTEND(N, Lo, Hi); break;
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case ISD::SIGN_EXTEND: ExpandResult_SIGN_EXTEND(N, Lo, Hi); break;
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case ISD::AssertZext: ExpandResult_AssertZext(N, Lo, Hi); break;
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case ISD::TRUNCATE: ExpandResult_TRUNCATE(N, Lo, Hi); break;
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case ISD::BIT_CONVERT: ExpandResult_BIT_CONVERT(N, Lo, Hi); break;
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case ISD::SIGN_EXTEND_INREG: ExpandResult_SIGN_EXTEND_INREG(N, Lo, Hi); break;
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case ISD::LOAD: ExpandResult_LOAD(cast<LoadSDNode>(N), Lo, Hi); break;
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@ -202,6 +204,34 @@ void DAGTypeLegalizer::ExpandResult_SIGN_EXTEND(SDNode *N,
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}
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}
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void DAGTypeLegalizer::ExpandResult_AssertZext(SDNode *N,
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SDOperand &Lo, SDOperand &Hi) {
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GetExpandedOp(N->getOperand(0), Lo, Hi);
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MVT::ValueType NVT = Lo.getValueType();
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MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
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unsigned NVTBits = MVT::getSizeInBits(NVT);
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unsigned EVTBits = MVT::getSizeInBits(EVT);
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if (NVTBits < EVTBits) {
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Hi = DAG.getNode(ISD::AssertZext, NVT, Hi,
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DAG.getValueType(MVT::getIntegerType(EVTBits - NVTBits)));
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} else {
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Lo = DAG.getNode(ISD::AssertZext, NVT, Lo, DAG.getValueType(EVT));
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// The high part must be zero, make it explicit.
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Hi = DAG.getConstant(0, NVT);
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}
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}
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void DAGTypeLegalizer::ExpandResult_TRUNCATE(SDNode *N,
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SDOperand &Lo, SDOperand &Hi) {
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MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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Lo = DAG.getNode(ISD::TRUNCATE, NVT, N->getOperand(0));
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Hi = DAG.getNode(ISD::SRL, N->getOperand(0).getValueType(), N->getOperand(0),
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DAG.getConstant(MVT::getSizeInBits(NVT),
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TLI.getShiftAmountTy()));
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Hi = DAG.getNode(ISD::TRUNCATE, NVT, Hi);
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}
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void DAGTypeLegalizer::ExpandResult_BIT_CONVERT(SDNode *N,
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SDOperand &Lo, SDOperand &Hi) {
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// Lower the bit-convert to a store/load from the stack, then expand the load.
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@ -2018,6 +2018,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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"Cannot *_EXTEND_INREG FP types");
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assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
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"Not extending!");
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if (VT == EVT) return N1; // noop assertion.
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break;
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}
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case ISD::SIGN_EXTEND_INREG: {
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