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Add truncate and AssertZext result expansion.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46926 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2008-02-10 10:08:52 +00:00
parent a900d17580
commit d885dbdf9e
3 changed files with 33 additions and 0 deletions
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2
lib/CodeGen/SelectionDAG/LegalizeTypes.h
View File

@ -209,6 +209,8 @@ private:
void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi);
void ExpandResult_ZERO_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
void ExpandResult_AssertZext (SDNode *N, SDOperand &Lo, SDOperand &Hi);
void ExpandResult_TRUNCATE (SDNode *N, SDOperand &Lo, SDOperand &Hi);
void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi);
void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);

30
lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
View File

@ -60,6 +60,8 @@ void DAGTypeLegalizer::ExpandResult(SDNode *N, unsigned ResNo) {
case ISD::ANY_EXTEND: ExpandResult_ANY_EXTEND(N, Lo, Hi); break;
case ISD::ZERO_EXTEND: ExpandResult_ZERO_EXTEND(N, Lo, Hi); break;
case ISD::SIGN_EXTEND: ExpandResult_SIGN_EXTEND(N, Lo, Hi); break;
case ISD::AssertZext: ExpandResult_AssertZext(N, Lo, Hi); break;
case ISD::TRUNCATE: ExpandResult_TRUNCATE(N, Lo, Hi); break;
case ISD::BIT_CONVERT: ExpandResult_BIT_CONVERT(N, Lo, Hi); break;
case ISD::SIGN_EXTEND_INREG: ExpandResult_SIGN_EXTEND_INREG(N, Lo, Hi); break;
case ISD::LOAD: ExpandResult_LOAD(cast<LoadSDNode>(N), Lo, Hi); break;
@ -202,6 +204,34 @@ void DAGTypeLegalizer::ExpandResult_SIGN_EXTEND(SDNode *N,
}
}
void DAGTypeLegalizer::ExpandResult_AssertZext(SDNode *N,
SDOperand &Lo, SDOperand &Hi) {
GetExpandedOp(N->getOperand(0), Lo, Hi);
MVT::ValueType NVT = Lo.getValueType();
MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
unsigned NVTBits = MVT::getSizeInBits(NVT);
unsigned EVTBits = MVT::getSizeInBits(EVT);
if (NVTBits < EVTBits) {
Hi = DAG.getNode(ISD::AssertZext, NVT, Hi,
DAG.getValueType(MVT::getIntegerType(EVTBits - NVTBits)));
} else {
Lo = DAG.getNode(ISD::AssertZext, NVT, Lo, DAG.getValueType(EVT));
// The high part must be zero, make it explicit.
Hi = DAG.getConstant(0, NVT);
}
}
void DAGTypeLegalizer::ExpandResult_TRUNCATE(SDNode *N,
SDOperand &Lo, SDOperand &Hi) {
MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
Lo = DAG.getNode(ISD::TRUNCATE, NVT, N->getOperand(0));
Hi = DAG.getNode(ISD::SRL, N->getOperand(0).getValueType(), N->getOperand(0),
DAG.getConstant(MVT::getSizeInBits(NVT),
TLI.getShiftAmountTy()));
Hi = DAG.getNode(ISD::TRUNCATE, NVT, Hi);
}
void DAGTypeLegalizer::ExpandResult_BIT_CONVERT(SDNode *N,
SDOperand &Lo, SDOperand &Hi) {
// Lower the bit-convert to a store/load from the stack, then expand the load.

1
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -2018,6 +2018,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
"Cannot *_EXTEND_INREG FP types");
assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
"Not extending!");
if (VT == EVT) return N1; // noop assertion.
break;
}
case ISD::SIGN_EXTEND_INREG: {