mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 02:29:18 +00:00
trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117740 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
0d2d2e9246
commit
d8a11c25fa
@ -91,7 +91,7 @@ public:
|
||||
unsigned getImmMinusOneOpValue(const MCInst &MI, unsigned Op) const {
|
||||
return MI.getOperand(Op).getImm() - 1;
|
||||
}
|
||||
|
||||
|
||||
unsigned getNEONVcvtImm32OpValue(const MCInst &MI, unsigned Op) const {
|
||||
return 64 - MI.getOperand(Op).getImm();
|
||||
}
|
||||
@ -154,7 +154,7 @@ unsigned ARMMCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
||||
const MCOperand &MO) const {
|
||||
if (MO.isReg()) {
|
||||
unsigned regno = getARMRegisterNumbering(MO.getReg());
|
||||
|
||||
|
||||
// Q registers are encodes as 2x their register number.
|
||||
switch (MO.getReg()) {
|
||||
case ARM::Q0: case ARM::Q1: case ARM::Q2: case ARM::Q3:
|
||||
|
Loading…
Reference in New Issue
Block a user