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Rewrite the darwin tlv support to use a chain and return to copying
the output to the correct register. Fixes a hidden problem uncovered by the last patch where we'd try to DAG combine our MVT::Other node oddly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121358 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6181,7 +6181,7 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
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OpFlag = X86II::MO_TLVP;
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OpFlag = X86II::MO_TLVP;
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DebugLoc DL = Op.getDebugLoc();
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DebugLoc DL = Op.getDebugLoc();
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SDValue Result = DAG.getTargetGlobalAddress(GA->getGlobal(), DL,
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SDValue Result = DAG.getTargetGlobalAddress(GA->getGlobal(), DL,
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getPointerTy(),
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GA->getValueType(0),
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GA->getOffset(), OpFlag);
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GA->getOffset(), OpFlag);
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SDValue Offset = DAG.getNode(WrapperKind, DL, getPointerTy(), Result);
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SDValue Offset = DAG.getNode(WrapperKind, DL, getPointerTy(), Result);
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@ -6194,8 +6194,10 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
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// Lowering the machine isd will make sure everything is in the right
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// Lowering the machine isd will make sure everything is in the right
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// location.
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// location.
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SDValue Args[] = { Offset };
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SDValue Chain = DAG.getEntryNode();
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SDValue RetVal = DAG.getNode(X86ISD::TLSCALL, DL, MVT::Other, Args, 1);
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SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag);
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SDValue Args[] = { Chain, Offset };
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Chain = DAG.getNode(X86ISD::TLSCALL, DL, NodeTys, Args, 2);
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// TLSCALL will be codegen'ed as call. Inform MFI that function has calls.
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// TLSCALL will be codegen'ed as call. Inform MFI that function has calls.
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MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
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MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
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@ -6203,7 +6205,8 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
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// And our return value (tls address) is in the standard call return value
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// And our return value (tls address) is in the standard call return value
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// location.
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// location.
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return RetVal;
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unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
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return DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy());
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}
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}
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assert(false &&
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assert(false &&
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@ -84,7 +84,7 @@ def SDTX86Wrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, SDTCisPtrTy<0>]>;
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def SDT_X86TLSADDR : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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def SDT_X86TLSADDR : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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def SDT_X86TLSCALL : SDTypeProfile<0, 1, [SDTCisPtrTy<0>]>;
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def SDT_X86TLSCALL : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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def SDT_X86EHRET : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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def SDT_X86EHRET : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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@ -212,7 +212,7 @@ def X86WinAlloca : SDNode<"X86ISD::WIN_ALLOCA", SDTX86Void,
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[SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
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[SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
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def X86TLSCall : SDNode<"X86ISD::TLSCALL", SDT_X86TLSCALL,
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def X86TLSCall : SDNode<"X86ISD::TLSCALL", SDT_X86TLSCALL,
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[]>;
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[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// X86 Operand Definitions.
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// X86 Operand Definitions.
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@ -1,5 +1,21 @@
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; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s
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%struct.A = type { [48 x i8], i32, i32, i32 }
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@c = external thread_local global %struct.A, align 4
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define void @main() nounwind ssp {
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entry:
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call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false)
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unreachable
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; CHECK: movq _c@TLVP(%rip), %rdi
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; CHECK-NEXT: callq *(%rdi)
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; CHECK-NEXT: movl $0, 56(%rax)
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; CHECK-NEXT: movq $0, 48(%rax)
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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@a = thread_local global i32 0 ; <i32*> [#uses=0]
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@a = thread_local global i32 0 ; <i32*> [#uses=0]
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@b = thread_local global i32 0 ; <i32*> [#uses=0]
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@b = thread_local global i32 0 ; <i32*> [#uses=0]
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