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VLDR fixups need special handling under Thumb. While the encoding is the same,
the order of the bytes in the data stream is flipped around. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121215 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -115,6 +115,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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Binary = ((Binary & 0x7ff) << 16) | (Binary >> 11);
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Binary = ((Binary & 0x7ff) << 16) | (Binary >> 11);
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return Binary;
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return Binary;
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}
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}
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case ARM::fixup_t2_pcrel_10:
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case ARM::fixup_arm_pcrel_10: {
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case ARM::fixup_arm_pcrel_10: {
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// Offset by 8 just as above.
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// Offset by 8 just as above.
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Value = Value - 8;
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Value = Value - 8;
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@ -127,6 +128,16 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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Value >>= 2;
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Value >>= 2;
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assert ((Value < 256) && "Out of range pc-relative fixup value!");
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assert ((Value < 256) && "Out of range pc-relative fixup value!");
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Value |= isAdd << 23;
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Value |= isAdd << 23;
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// Same addressing mode as fixup_arm_pcrel_10, but with the bytes reordered.
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if (Kind == ARM::fixup_t2_pcrel_10) {
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uint64_t swapped = (Value & 0x00FF0000) >> 16;
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swapped |= (Value & 0xFF000000) >> 16;
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swapped |= (Value & 0x000000FF) << 16;
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swapped |= (Value & 0x0000FF00) << 16;
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return swapped;
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}
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return Value;
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return Value;
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}
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}
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}
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}
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@ -218,6 +229,7 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_branch:
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case ARM::fixup_arm_branch:
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return 3;
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return 3;
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case ARM::fixup_t2_pcrel_10:
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_bl:
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return 4;
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return 4;
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}
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}
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@ -19,9 +19,12 @@ enum Fixups {
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// addresses
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// addresses
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fixup_arm_ldst_pcrel_12 = FirstTargetFixupKind,
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fixup_arm_ldst_pcrel_12 = FirstTargetFixupKind,
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// fixup_arm_pcrel_10 - 10-bit PC relative relocation for symbol addresses
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// fixup_arm_pcrel_10 - 10-bit PC relative relocation for symbol addresses
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// used in VFP and Thumb2 instructions where the lower 2 bits are not encoded
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// used in VFP instructions where the lower 2 bits are not encoded
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// (so it's encoded as an 8-bit immediate).
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// (so it's encoded as an 8-bit immediate).
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fixup_arm_pcrel_10,
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fixup_arm_pcrel_10,
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// fixup_t2_pcrel_10 - Equivalent to fixup_arm_pcrel_10, accounting for
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// the byteswapped encoding of Thumb2 instructions.
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fixup_t2_pcrel_10,
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// fixup_arm_adr_pcrel_12 - 12-bit PC relative relocation for the ADR
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// fixup_arm_adr_pcrel_12 - 12-bit PC relative relocation for the ADR
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// instruction.
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// instruction.
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fixup_arm_adr_pcrel_12,
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fixup_arm_adr_pcrel_12,
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@ -48,6 +48,7 @@ public:
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// name off bits flags
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// name off bits flags
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{ "fixup_arm_ldst_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_ldst_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_pcrel_10", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_pcrel_10", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_t2_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_adr_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_adr_pcrel_12", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_branch", 1, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
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@ -737,7 +738,12 @@ getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx,
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assert(MO.isExpr() && "Unexpected machine operand type!");
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assert(MO.isExpr() && "Unexpected machine operand type!");
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const MCExpr *Expr = MO.getExpr();
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const MCExpr *Expr = MO.getExpr();
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MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_10);
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MCFixupKind Kind;
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const ARMSubtarget &Subtarget = TM.getSubtarget<ARMSubtarget>();
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if (Subtarget.isThumb2())
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Kind = MCFixupKind(ARM::fixup_t2_pcrel_10);
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else
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Kind = MCFixupKind(ARM::fixup_arm_pcrel_10);
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Fixups.push_back(MCFixup::Create(0, Expr, Kind));
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Fixups.push_back(MCFixup::Create(0, Expr, Kind));
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++MCNumCPRelocations;
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++MCNumCPRelocations;
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