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ARM two-operand aliases for VADD instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146091 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-12-07 22:52:54 +00:00
parent 32c5981005
commit d900441e13
2 changed files with 47 additions and 0 deletions
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24
lib/Target/ARM/ARMInstrNEON.td
View File

@ -5297,6 +5297,30 @@ def : Pat<(v2f64 (bitconvert (v4f32 QPR:$src))), (v2f64 QPR:$src)>;
// Assembler aliases
//
// VADD two-operand aliases.
def : NEONInstAlias<"vadd${p}.i8 $Vdn, $Vm",
(VADDv16i8 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.i16 $Vdn, $Vm",
(VADDv8i16 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.i32 $Vdn, $Vm",
(VADDv4i32 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.i64 $Vdn, $Vm",
(VADDv2i64 QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.i8 $Vdn, $Vm",
(VADDv8i8 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.i16 $Vdn, $Vm",
(VADDv4i16 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.i32 $Vdn, $Vm",
(VADDv2i32 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.i64 $Vdn, $Vm",
(VADDv1i64 DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.f32 $Vdn, $Vm",
(VADDfd DPR:$Vdn, DPR:$Vdn, DPR:$Vm, pred:$p)>;
def : NEONInstAlias<"vadd${p}.f32 $Vdn, $Vm",
(VADDfq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
// VAND/VEOR/VORR accept but do not require a type suffix.
defm : VFPDTAnyInstAlias<"vand${p}", "$Vd, $Vn, $Vm",
(VANDd DPR:$Vd, DPR:$Vn, DPR:$Vm, pred:$p)>;

23
test/MC/ARM/neon-add-encoding.s
View File

@ -135,3 +135,26 @@
vraddhn.i32 d16, q8, q9
@ CHECK: vraddhn.i64 d16, q8, q9 @ encoding: [0xa2,0x04,0xe0,0xf3]
vraddhn.i64 d16, q8, q9
@ Two-operand variants
vadd.i8 d6, d5
vadd.i16 d7, d1
vadd.i32 d8, d2
vadd.i64 d9, d3
vadd.i8 q6, q5
vadd.i16 q7, q1
vadd.i32 q8, q2
vadd.i64 q9, q3
@ CHECK: vadd.i8 d6, d6, d5 @ encoding: [0x05,0x68,0x06,0xf2]
@ CHECK: vadd.i16 d7, d7, d1 @ encoding: [0x01,0x78,0x17,0xf2]
@ CHECK: vadd.i32 d8, d8, d2 @ encoding: [0x02,0x88,0x28,0xf2]
@ CHECK: vadd.i64 d9, d9, d3 @ encoding: [0x03,0x98,0x39,0xf2]
@ CHECK: vadd.i8 q6, q6, q5 @ encoding: [0x4a,0xc8,0x0c,0xf2]
@ CHECK: vadd.i16 q7, q7, q1 @ encoding: [0x42,0xe8,0x1e,0xf2]
@ CHECK: vadd.i32 q8, q8, q2 @ encoding: [0xc4,0x08,0x60,0xf2]
@ CHECK: vadd.i64 q9, q9, q3 @ encoding: [0xc6,0x28,0x72,0xf2]