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Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2009-05-05 00:30:09 +00:00
parent c3806ea3bc
commit d923fc621f
4 changed files with 20 additions and 26 deletions
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7
include/llvm/Target/TargetInstrInfo.h
View File

@ -20,6 +20,7 @@
namespace llvm { namespace llvm {
class TargetRegisterClass; class TargetRegisterClass;
class TargetRegisterInfo;
class LiveVariables; class LiveVariables;
class CalleeSavedInfo; class CalleeSavedInfo;
class SDNode; class SDNode;
@ -505,6 +506,12 @@ public:
virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const; virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const;
}; };
/// getInstrOperandRegClass - Return register class of the operand of an
/// instruction of the specified TargetInstrDesc.
const TargetRegisterClass*
getInstrOperandRegClass(const TargetRegisterInfo *TRI,
const TargetInstrDesc &II, unsigned Op);
} // End llvm namespace } // End llvm namespace
#endif #endif

12
lib/CodeGen/PostRASchedulerList.cpp
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@ -418,18 +418,6 @@ void SchedulePostRATDList::FinishBlock() {
ScheduleDAGInstrs::FinishBlock(); ScheduleDAGInstrs::FinishBlock();
} }
/// getInstrOperandRegClass - Return register class of the operand of an
/// instruction of the specified TargetInstrDesc.
static const TargetRegisterClass*
getInstrOperandRegClass(const TargetRegisterInfo *TRI,
const TargetInstrDesc &II, unsigned Op) {
if (Op >= II.getNumOperands())
return NULL;
if (II.OpInfo[Op].isLookupPtrRegClass())
return TRI->getPointerRegClass();
return TRI->getRegClass(II.OpInfo[Op].RegClass);
}
/// CriticalPathStep - Return the next SUnit after SU on the bottom-up /// CriticalPathStep - Return the next SUnit after SU on the bottom-up
/// critical path. /// critical path.
static SDep *CriticalPathStep(SUnit *SU) { static SDep *CriticalPathStep(SUnit *SU) {

14
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
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@ -28,20 +28,6 @@
#include "llvm/Support/MathExtras.h" #include "llvm/Support/MathExtras.h"
using namespace llvm; using namespace llvm;
/// getInstrOperandRegClass - Return register class of the operand of an
/// instruction of the specified TargetInstrDesc.
static const TargetRegisterClass*
getInstrOperandRegClass(const TargetRegisterInfo *TRI,
const TargetInstrDesc &II, unsigned Op) {
if (Op >= II.getNumOperands()) {
assert(II.isVariadic() && "Invalid operand # of instruction");
return NULL;
}
if (II.OpInfo[Op].isLookupPtrRegClass())
return TRI->getPointerRegClass();
return TRI->getRegClass(II.OpInfo[Op].RegClass);
}
/// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
/// implicit physical register output. /// implicit physical register output.
void ScheduleDAGSDNodes::EmitCopyFromReg(SDNode *Node, unsigned ResNo, void ScheduleDAGSDNodes::EmitCopyFromReg(SDNode *Node, unsigned ResNo,

13
lib/Target/TargetInstrInfo.cpp
View File

@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Constant.h" #include "llvm/Constant.h"
#include "llvm/DerivedTypes.h" #include "llvm/DerivedTypes.h"
using namespace llvm; using namespace llvm;
@ -35,3 +36,15 @@ bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
return true; return true;
return !isPredicated(MI); return !isPredicated(MI);
} }
/// getInstrOperandRegClass - Return register class of the operand of an
/// instruction of the specified TargetInstrDesc.
const TargetRegisterClass*
llvm::getInstrOperandRegClass(const TargetRegisterInfo *TRI,
const TargetInstrDesc &II, unsigned Op) {
if (Op >= II.getNumOperands())
return NULL;
if (II.OpInfo[Op].isLookupPtrRegClass())
return TRI->getPointerRegClass();
return TRI->getRegClass(II.OpInfo[Op].RegClass);
}