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[mips] NotMips64 predicate is really a test for 32-bit GPR's.

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Summary:
Similarly, the HasMips64 on the 64-bit move InstAlias is a test for 64-bit
GPR's.

No functional change.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://reviews.llvm.org/D3263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205968 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-04-10 15:00:28 +00:00
parent e2d124d396
commit d95a78ca52
2 changed files with 6 additions and 4 deletions
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2
lib/Target/Mips/Mips64InstrInfo.td
View File

@ -409,7 +409,7 @@ def : MipsPat<(bswap GPR64:$rt), (DSHD (DSBH GPR64:$rt))>;
//===----------------------------------------------------------------------===//
def : InstAlias<"move $dst, $src",
(DADDu GPR64Opnd:$dst, GPR64Opnd:$src, ZERO_64), 1>,
Requires<[HasMips64]>;
Requires<[IsGP64]>;
def : InstAlias<"daddu $rs, $rt, $imm",
(DADDiu GPR64Opnd:$rs, GPR64Opnd:$rt, simm16_64:$imm),
0>;

8
lib/Target/Mips/MipsInstrInfo.td
View File

@ -162,8 +162,10 @@ def HasMips32r2 : Predicate<"Subtarget.hasMips32r2()">,
AssemblerPredicate<"FeatureMips32r2">;
def HasMips64 : Predicate<"Subtarget.hasMips64()">,
AssemblerPredicate<"FeatureMips64">;
def NotMips64 : Predicate<"!Subtarget.hasMips64()">,
AssemblerPredicate<"!FeatureMips64">;
def IsGP32 : Predicate<"!Subtarget.isGP64()">,
AssemblerPredicate<"!FeatureGP64Bit">;
def IsGP64 : Predicate<"Subtarget.isGP64()">,
AssemblerPredicate<"FeatureGP64Bit">;
def HasMips64r2 : Predicate<"Subtarget.hasMips64r2()">,
AssemblerPredicate<"FeatureMips64r2">;
def IsN64 : Predicate<"Subtarget.isABI_N64()">,
@ -1171,7 +1173,7 @@ def PAUSE : Barrier<"pause">, BARRIER_FM<5>, Requires<[HasMips32r2]>;
//===----------------------------------------------------------------------===//
def : InstAlias<"move $dst, $src",
(ADDu GPR32Opnd:$dst, GPR32Opnd:$src,ZERO), 1>,
Requires<[NotMips64, NotInMicroMips]>;
Requires<[IsGP32, NotInMicroMips]>;
def : InstAlias<"bal $offset", (BGEZAL ZERO, brtarget:$offset), 0>;
def : InstAlias<"addu $rs, $rt, $imm",
(ADDiu GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm), 0>;