Correctly load FP constants out of the constant pool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14782 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-07-12 23:49:47 +00:00
parent f028f82a58
commit d9aa7836e2
2 changed files with 6 additions and 12 deletions

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@ -1608,20 +1608,17 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
MachineConstantPool *CP = F->getConstantPool();
unsigned CPI = CP->getConstantPoolIndex(Op1C);
const Type *Ty = Op1->getType();
assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
static const unsigned OpcodeTab[][4] = {
{ PPC32::FADDS, PPC32::FSUBS, PPC32::FMULS, PPC32::FDIVS }, // Float
{ PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV }, // Double
};
assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
unsigned TempReg = makeAnotherReg(Ty);
unsigned LoadOpcode = (Ty == Type::FloatTy) ? PPC32::LFS : PPC32::LFD;
addConstantPoolReference(BuildMI(*BB, IP, LoadOpcode, 2, TempReg), CPI);
unsigned Op1Reg = getReg(Op1C);
unsigned Opcode = OpcodeTab[Ty != Type::FloatTy][OperatorClass];
unsigned Op0r = getReg(Op0, BB, IP);
BuildMI(*BB, IP, Opcode, DestReg).addReg(Op0r).addReg(TempReg);
BuildMI(*BB, IP, Opcode, DestReg).addReg(Op0r).addReg(Op1Reg);
return;
}

View File

@ -1608,20 +1608,17 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
MachineConstantPool *CP = F->getConstantPool();
unsigned CPI = CP->getConstantPoolIndex(Op1C);
const Type *Ty = Op1->getType();
assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
static const unsigned OpcodeTab[][4] = {
{ PPC32::FADDS, PPC32::FSUBS, PPC32::FMULS, PPC32::FDIVS }, // Float
{ PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV }, // Double
};
assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
unsigned TempReg = makeAnotherReg(Ty);
unsigned LoadOpcode = (Ty == Type::FloatTy) ? PPC32::LFS : PPC32::LFD;
addConstantPoolReference(BuildMI(*BB, IP, LoadOpcode, 2, TempReg), CPI);
unsigned Op1Reg = getReg(Op1C);
unsigned Opcode = OpcodeTab[Ty != Type::FloatTy][OperatorClass];
unsigned Op0r = getReg(Op0, BB, IP);
BuildMI(*BB, IP, Opcode, DestReg).addReg(Op0r).addReg(TempReg);
BuildMI(*BB, IP, Opcode, DestReg).addReg(Op0r).addReg(Op1Reg);
return;
}