Update bitcode reader and writer to handle multiple return values.

Take 2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47583 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Devang Patel 2008-02-26 01:29:32 +00:00
parent aaeb60ae40
commit d9d99ff8e8
3 changed files with 35 additions and 19 deletions

View File

@ -1337,17 +1337,24 @@ bool BitcodeReader::ParseFunctionBody(Function *F) {
}
case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval<optional>]
if (Record.empty()) {
I = new ReturnInst();
break;
} else {
unsigned OpNum = 0;
Value *Op;
if (getValueTypePair(Record, OpNum, NextValueNo, Op) ||
OpNum != Record.size())
return Error("Invalid RET record");
I = new ReturnInst(Op);
break;
{
unsigned Size = Record.size();
if (Size == 0) {
I = new ReturnInst();
break;
} else {
unsigned OpNum = 0;
std::vector<Value *> Vs;
do {
Value *Op = NULL;
if (getValueTypePair(Record, OpNum, NextValueNo, Op))
return Error("Invalid RET record");
Vs.push_back(Op);
} while(OpNum != Record.size());
I = new ReturnInst(Vs);
break;
}
}
case bitc::FUNC_CODE_INST_BR: { // BR: [bb#, bb#, opval] or [bb#]
if (Record.size() != 1 && Record.size() != 3)

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@ -747,15 +747,24 @@ static void WriteInstruction(const Instruction &I, unsigned InstID,
case Instruction::GetResult:
Code = bitc::FUNC_CODE_INST_GETRESULT;
PushValueAndType(I.getOperand(0), InstID, Vals, VE);
Vals.push_back(Log2_32(cast<GetResultInst>(I).getIndex())+1);
Vals.push_back(cast<GetResultInst>(I).getIndex());
break;
case Instruction::Ret:
Code = bitc::FUNC_CODE_INST_RET;
if (!I.getNumOperands())
AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV;
else if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE))
AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV;
case Instruction::Ret:
{
Code = bitc::FUNC_CODE_INST_RET;
unsigned NumOperands = I.getNumOperands();
// printf ("dpatel write %d\n", NumOperands);
if (NumOperands == 0)
AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV;
else if (NumOperands == 1) {
if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE))
AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV;
} else {
for (unsigned i = 0, e = NumOperands; i != e; ++i)
PushValueAndType(I.getOperand(i), InstID, Vals, VE);
}
}
break;
case Instruction::Br:
Code = bitc::FUNC_CODE_INST_BR;

View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s -disable-output
; RUN: llvm-as < %s | opt -verify | llvm-dis | llvm-as -disable-output
define {i32, i8} @foo(i32 %p) {
ret i32 1, i8 2