Move getInitialFrameState() to TargetFrameInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119754 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2010-11-18 23:25:52 +00:00
parent 75b7b879c0
commit d9e3385ced
25 changed files with 84 additions and 84 deletions

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@ -15,10 +15,12 @@
#define LLVM_TARGET_TARGETFRAMEINFO_H
#include <utility>
#include <vector>
namespace llvm {
class MachineFunction;
class MachineBasicBlock;
class MachineMove;
/// Information about stack frame layout on the target. It holds the direction
/// of stack growth, the known stack alignment on entry to each function, and
@ -131,6 +133,10 @@ public:
return hasReservedCallFrame(MF) || hasFP(MF);
}
/// getInitialFrameState - Returns a list of machine moves that are assumed
/// on entry to all functions. Note that LabelID is ignored (assumed to be
/// the beginning of the function.)
virtual void getInitialFrameState(std::vector<MachineMove> &Moves) const;
};
} // End llvm namespace

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@ -749,11 +749,6 @@ public:
/// getRARegister - This method should return the register where the return
/// address can be found.
virtual unsigned getRARegister() const = 0;
/// getInitialFrameState - Returns a list of machine moves that are assumed
/// on entry to all functions. Note that LabelID is ignored (assumed to be
/// the beginning of the function.)
virtual void getInitialFrameState(std::vector<MachineMove> &Moves) const;
};

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@ -3293,10 +3293,11 @@ void DwarfDebug::emitCommonDebugFrame() {
Asm->EmitSLEB128(stackGrowth, "CIE Data Alignment Factor");
Asm->OutStreamer.AddComment("CIE RA Column");
const TargetRegisterInfo *RI = Asm->TM.getRegisterInfo();
const TargetFrameInfo *TFI = Asm->TM.getFrameInfo();
Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister(), false));
std::vector<MachineMove> Moves;
RI->getInitialFrameState(Moves);
TFI->getInitialFrameState(Moves);
Asm->EmitFrameMoves(Moves, 0, false);

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@ -127,6 +127,7 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) {
Asm->OutStreamer.AddComment("CIE Return Address Column");
const TargetRegisterInfo *RI = Asm->TM.getRegisterInfo();
const TargetFrameInfo *TFI = Asm->TM.getFrameInfo();
Asm->EmitInt8(RI->getDwarfRegNum(RI->getRARegister(), true));
if (Augmentation[0]) {
@ -146,7 +147,7 @@ void DwarfException::EmitCIE(const Function *PersonalityFn, unsigned Index) {
// Indicate locations of general callee saved registers in frame.
std::vector<MachineMove> Moves;
RI->getInitialFrameState(Moves);
TFI->getInitialFrameState(Moves);
Asm->EmitFrameMoves(Moves, 0, true);
// On Darwin the linker honors the alignment of eh_frame, which means it must

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@ -45,6 +45,7 @@ unsigned char* JITDwarfEmitter::EmitDwarfTable(MachineFunction& F,
TD = TM.getTargetData();
stackGrowthDirection = TM.getFrameInfo()->getStackGrowthDirection();
RI = TM.getRegisterInfo();
TFI = TM.getFrameInfo();
JCE = &jce;
unsigned char* ExceptionTable = EmitExceptionTable(&F, StartFunction,
@ -523,7 +524,7 @@ JITDwarfEmitter::EmitCommonEHFrame(const Function* Personality) const {
}
std::vector<MachineMove> Moves;
RI->getInitialFrameState(Moves);
TFI->getInitialFrameState(Moves);
EmitFrameMoves(0, Moves);
JCE->emitAlignmentWithFill(PointerSize, dwarf::DW_CFA_nop);

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@ -23,6 +23,7 @@ class MachineFunction;
class MachineModuleInfo;
class MachineMove;
class TargetData;
class TargetFrameInfo;
class TargetMachine;
class TargetRegisterInfo;
@ -30,6 +31,7 @@ class JITDwarfEmitter {
const TargetData* TD;
JITCodeEmitter* JCE;
const TargetRegisterInfo* RI;
const TargetFrameInfo *TFI;
MachineModuleInfo* MMI;
JIT& Jit;
bool stackGrowthDirection;

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@ -248,3 +248,10 @@ void SPUFrameInfo::emitEpilogue(MachineFunction &MF,
}
}
}
void SPUFrameInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const {
// Initial state of the frame pointer is R1.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(SPU::R1, 0);
Moves.push_back(MachineMove(0, Dst, Src));
}

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@ -40,6 +40,9 @@ namespace llvm {
//! Prediate: Target has dedicated frame pointer
bool hasFP(const MachineFunction &MF) const;
//! Perform target-specific stack frame setup.
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
//! Return a function's saved spill slots
/*!
For CellSPU, a function's saved spill slots is just the link register.

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@ -340,16 +340,6 @@ SPURegisterInfo::getFrameRegister(const MachineFunction &MF) const
return SPU::R1;
}
void
SPURegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const
{
// Initial state of the frame pointer is R1.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(SPU::R1, 0);
Moves.push_back(MachineMove(0, Dst, Src));
}
int
SPURegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
// FIXME: Most probably dwarf numbers differs for Linux and Darwin

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@ -71,8 +71,6 @@ namespace llvm {
unsigned getRARegister() const;
//! Get the stack frame register (SP, aka R1)
unsigned getFrameRegister(const MachineFunction &MF) const;
//! Perform target-specific stack frame setup.
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
//------------------------------------------------------------------------
// New methods added:

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@ -689,3 +689,10 @@ void PPCFrameInfo::emitEpilogue(MachineFunction &MF,
BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBA8)).addImm(JumpTarget.getImm());
}
}
void PPCFrameInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const {
// Initial state of the frame pointer is R1.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(PPC::R1, 0);
Moves.push_back(MachineMove(0, Dst, Src));
}

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@ -38,6 +38,7 @@ public:
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
bool hasFP(const MachineFunction &MF) const;
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
/// targetHandlesStackFrameRounding - Returns true if the target is
/// responsible for rounding up the stack frame (probably at emitPrologue

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@ -943,14 +943,6 @@ unsigned PPCRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
return TFI->hasFP(MF) ? PPC::X31 : PPC::X1;
}
void PPCRegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves)
const {
// Initial state of the frame pointer is R1.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(PPC::R1, 0);
Moves.push_back(MachineMove(0, Dst, Src));
}
unsigned PPCRegisterInfo::getEHExceptionRegister() const {
return !Subtarget.isPPC64() ? PPC::R3 : PPC::X3;
}

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@ -66,7 +66,6 @@ public:
// Debug information queries.
unsigned getRARegister() const;
unsigned getFrameRegister(const MachineFunction &MF) const;
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
// Exception handling queries.
unsigned getEHExceptionRegister() const;

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@ -17,3 +17,10 @@ using namespace llvm;
TargetFrameInfo::~TargetFrameInfo() {
}
/// getInitialFrameState - Returns a list of machine moves that are assumed
/// on entry to a function.
void
TargetFrameInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const {
// Default is to do nothing.
}

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@ -98,13 +98,6 @@ int TargetRegisterInfo::getFrameIndexOffset(const MachineFunction &MF,
TFI.getOffsetOfLocalArea() + MFI->getOffsetAdjustment();
}
/// getInitialFrameState - Returns a list of machine moves that are assumed
/// on entry to a function.
void
TargetRegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const{
// Default is to do nothing.
}
const TargetRegisterClass *
llvm::getCommonSubClass(const TargetRegisterClass *A,
const TargetRegisterClass *B) {

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@ -15,6 +15,7 @@
#include "X86InstrBuilder.h"
#include "X86InstrInfo.h"
#include "X86MachineFunctionInfo.h"
#include "X86TargetMachine.h"
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
@ -40,7 +41,7 @@ bool X86FrameInfo::hasReservedCallFrame(const MachineFunction &MF) const {
bool X86FrameInfo::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
const MachineModuleInfo &MMI = MF.getMMI();
const TargetRegisterInfo *RI = MF.getTarget().getRegisterInfo();
const TargetRegisterInfo *RI = TM.getRegisterInfo();
return (DisableFramePointerElim(MF) ||
RI->needsStackRealignment(MF) ||
@ -211,12 +212,12 @@ void X86FrameInfo::emitCalleeSavedFrameMoves(MachineFunction &MF,
if (CSI.empty()) return;
std::vector<MachineMove> &Moves = MMI.getFrameMoves();
const TargetData *TD = MF.getTarget().getTargetData();
const TargetData *TD = TM.getTargetData();
bool HasFP = hasFP(MF);
// Calculate amount of bytes used for return address storing.
int stackGrowth =
(MF.getTarget().getFrameInfo()->getStackGrowthDirection() ==
(TM.getFrameInfo()->getStackGrowthDirection() ==
TargetFrameInfo::StackGrowsUp ?
TD->getPointerSize() : -TD->getPointerSize());
@ -276,11 +277,8 @@ void X86FrameInfo::emitPrologue(MachineFunction &MF) const {
MachineBasicBlock::iterator MBBI = MBB.begin();
MachineFrameInfo *MFI = MF.getFrameInfo();
const Function *Fn = MF.getFunction();
const X86Subtarget *Subtarget = &MF.getTarget().getSubtarget<X86Subtarget>();
const X86RegisterInfo *RegInfo =
static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());
const X86InstrInfo &TII =
*static_cast<const X86InstrInfo*>(MF.getTarget().getInstrInfo());
const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
const X86InstrInfo &TII = *TM.getInstrInfo();
MachineModuleInfo &MMI = MF.getMMI();
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
bool needsFrameMoves = MMI.hasDebugInfo() ||
@ -487,13 +485,12 @@ void X86FrameInfo::emitPrologue(MachineFunction &MF) const {
// responsible for adjusting the stack pointer. Touching the stack at 4K
// increments is necessary to ensure that the guard pages used by the OS
// virtual memory manager are allocated in correct sequence.
if (NumBytes >= 4096 &&
(Subtarget->isTargetCygMing() || Subtarget->isTargetWin32())) {
if (NumBytes >= 4096 && (STI.isTargetCygMing() || STI.isTargetWin32())) {
// Check whether EAX is livein for this function.
bool isEAXAlive = isEAXLiveIn(MF);
const char *StackProbeSymbol =
Subtarget->isTargetWindows() ? "_chkstk" : "_alloca";
STI.isTargetWindows() ? "_chkstk" : "_alloca";
unsigned CallOp = Is64Bit ? X86::CALL64pcrel32 : X86::CALLpcrel32;
if (!isEAXAlive) {
BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
@ -522,7 +519,7 @@ void X86FrameInfo::emitPrologue(MachineFunction &MF) const {
StackPtr, false, NumBytes - 4);
MBB.insert(MBBI, MI);
}
} else if (NumBytes >= 4096 && Subtarget->isTargetWin64()) {
} else if (NumBytes >= 4096 && STI.isTargetWin64()) {
// Sanity check that EAX is not livein for this function. It should
// should not be, so throw an assert.
assert(!isEAXLiveIn(MF) && "EAX is livein in the Win64 case!");
@ -568,10 +565,8 @@ void X86FrameInfo::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
const X86RegisterInfo *RegInfo =
static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());
const X86InstrInfo &TII =
*static_cast<const X86InstrInfo*>(MF.getTarget().getInstrInfo());
const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
const X86InstrInfo &TII = *TM.getInstrInfo();
MachineBasicBlock::iterator MBBI = prior(MBB.end());
unsigned RetOpcode = MBBI->getOpcode();
DebugLoc DL = MBBI->getDebugLoc();
@ -752,3 +747,20 @@ void X86FrameInfo::emitEpilogue(MachineFunction &MF,
emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, TII);
}
}
void
X86FrameInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const {
// Calculate amount of bytes used for return address storing
int stackGrowth = (STI.is64Bit() ? -8 : -4);
const X86RegisterInfo *RI = TM.getRegisterInfo();
// Initial state of the frame pointer is esp+stackGrowth.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(RI->getStackRegister(), stackGrowth);
Moves.push_back(MachineMove(0, Dst, Src));
// Add return address to move list
MachineLocation CSDst(RI->getStackRegister(), stackGrowth);
MachineLocation CSSrc(RI->getRARegister());
Moves.push_back(MachineMove(0, CSDst, CSSrc));
}

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@ -19,17 +19,17 @@
namespace llvm {
class MCSymbol;
class X86TargetMachine;
class X86FrameInfo : public TargetFrameInfo {
protected:
const X86TargetMachine &TM;
const X86Subtarget &STI;
public:
explicit X86FrameInfo(const X86Subtarget &sti)
explicit X86FrameInfo(const X86TargetMachine &tm, const X86Subtarget &sti)
: TargetFrameInfo(StackGrowsDown,
sti.getStackAlignment(),
(sti.isTargetWin64() ? -40 : (sti.is64Bit() ? -8 : -4))),
STI(sti) {
TM(tm), STI(sti) {
}
void emitCalleeSavedFrameMoves(MachineFunction &MF, MCSymbol *Label,
@ -43,6 +43,7 @@ public:
bool hasFP(const MachineFunction &MF) const;
bool hasReservedCallFrame(const MachineFunction &MF) const;
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
};
} // End llvm namespace

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@ -694,22 +694,6 @@ unsigned X86RegisterInfo::getFrameRegister(const MachineFunction &MF) const {
return TFI->hasFP(MF) ? FramePtr : StackPtr;
}
void
X86RegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const {
// Calculate amount of bytes used for return address storing
int stackGrowth = (Is64Bit ? -8 : -4);
// Initial state of the frame pointer is esp+stackGrowth.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(StackPtr, stackGrowth);
Moves.push_back(MachineMove(0, Dst, Src));
// Add return address to move list
MachineLocation CSDst(StackPtr, stackGrowth);
MachineLocation CSSrc(getRARegister());
Moves.push_back(MachineMove(0, CSDst, CSSrc));
}
unsigned X86RegisterInfo::getEHExceptionRegister() const {
llvm_unreachable("What is the exception register");
return 0;

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@ -136,7 +136,6 @@ public:
unsigned getSlotSize() const { return SlotSize; }
int getFrameIndexOffset(const MachineFunction &MF, int FI) const;
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
// Exception handling queries.
unsigned getEHExceptionRegister() const;

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@ -117,9 +117,9 @@ X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
///
X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T, TT),
: LLVMTargetMachine(T, TT),
Subtarget(TT, FS, is64Bit),
FrameInfo(Subtarget),
FrameInfo(*this, Subtarget),
ELFWriterInfo(is64Bit, true) {
DefRelocModel = getRelocationModel();

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@ -263,3 +263,11 @@ void XCoreFrameInfo::emitEpilogue(MachineFunction &MF,
}
}
}
void XCoreFrameInfo::getInitialFrameState(std::vector<MachineMove> &Moves)
const {
// Initial state of the frame pointer is SP.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(XCore::SP, 0);
Moves.push_back(MachineMove(0, Dst, Src));
}

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@ -33,6 +33,8 @@ namespace llvm {
bool hasFP(const MachineFunction &MF) const;
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
//! Stack slot size (4 bytes)
static int stackSlotSize() {
return 4;

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@ -364,13 +364,5 @@ unsigned XCoreRegisterInfo::getRARegister() const {
return XCore::LR;
}
void XCoreRegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves)
const {
// Initial state of the frame pointer is SP.
MachineLocation Dst(MachineLocation::VirtualFP);
MachineLocation Src(XCore::SP, 0);
Moves.push_back(MachineMove(0, Dst, Src));
}
#include "XCoreGenRegisterInfo.inc"

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@ -63,7 +63,6 @@ public:
// Debug information queries.
unsigned getRARegister() const;
unsigned getFrameRegister(const MachineFunction &MF) const;
void getInitialFrameState(std::vector<MachineMove> &Moves) const;
//! Return the array of argument passing registers
/*!