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Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2008-03-15 00:03:38 +00:00
parent af59b105bb
commit da47e6e0d0
31 changed files with 68 additions and 178 deletions
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utils/TableGen/CodeEmitterGen.cpp
+6 -3
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@@ -29,7 +29,8 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
R->getName() == "LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG") continue;
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
@@ -103,7 +104,8 @@ void CodeEmitterGen::run(std::ostream &o) {
R->getName() == "LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG") {
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF") {
o << " 0U";
continue;
}
@@ -136,7 +138,8 @@ void CodeEmitterGen::run(std::ostream &o) {
InstName == "LABEL"||
InstName == "DECLARE"||
InstName == "EXTRACT_SUBREG" ||
InstName == "INSERT_SUBREG") continue;
InstName == "INSERT_SUBREG" ||
InstName == "IMPLICIT_DEF") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();