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no need to expand ISD::TRAP to X86ISD::TRAP, just match ISD::TRAP.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46015 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2008-01-15 21:58:22 +00:00
parent 41bab0beac
commit da68d30d24
3 changed files with 6 additions and 17 deletions
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8
lib/Target/X86/X86ISelLowering.cpp
View File

@ -294,7 +294,7 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
setOperationAction(ISD::TRAMPOLINE, MVT::Other, Custom);
setOperationAction(ISD::TRAP, MVT::Other, Custom);
setOperationAction(ISD::TRAP, MVT::Other, Legal);
// VASTART needs to be custom lowered to use the VarArgsFrameIndex
setOperationAction(ISD::VASTART , MVT::Other, Custom);
@ -4950,10 +4950,6 @@ SDOperand X86TargetLowering::LowerFLT_ROUNDS(SDOperand Op, SelectionDAG &DAG) {
ISD::TRUNCATE : ISD::ZERO_EXTEND), VT, RetVal);
}
SDOperand X86TargetLowering::LowerTRAP(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(X86ISD::TRAP, MVT::Other, Op.getOperand(0));
}
SDOperand X86TargetLowering::LowerCTLZ(SDOperand Op, SelectionDAG &DAG) {
MVT::ValueType VT = Op.getValueType();
MVT::ValueType OpVT = VT;
@ -5058,7 +5054,6 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
case ISD::FLT_ROUNDS: return LowerFLT_ROUNDS(Op, DAG);
case ISD::CTLZ: return LowerCTLZ(Op, DAG);
case ISD::CTTZ: return LowerCTTZ(Op, DAG);
case ISD::TRAP: return LowerTRAP(Op, DAG);
// FIXME: REMOVE THIS WHEN LegalizeDAGTypes lands.
case ISD::READCYCLECOUNTER:
@ -5098,7 +5093,6 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
case X86ISD::CALL: return "X86ISD::CALL";
case X86ISD::TAILCALL: return "X86ISD::TAILCALL";
case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG";
case X86ISD::TRAP: return "X86ISD::TRAP";
case X86ISD::CMP: return "X86ISD::CMP";
case X86ISD::COMI: return "X86ISD::COMI";
case X86ISD::UCOMI: return "X86ISD::UCOMI";

6
lib/Target/X86/X86ISelLowering.h
View File

@ -197,10 +197,7 @@ namespace llvm {
TC_RETURN,
// Store FP control world into i16 memory
FNSTCW16m,
// Trapping instruction
TRAP
FNSTCW16m
};
}
@ -487,7 +484,6 @@ namespace llvm {
SDOperand LowerEH_RETURN(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerTRAMPOLINE(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerFLT_ROUNDS(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerTRAP(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerCTLZ(SDOperand Op, SelectionDAG &DAG);
SDOperand LowerCTTZ(SDOperand Op, SelectionDAG &DAG);
SDNode *ExpandFP_TO_SINT(SDNode *N, SelectionDAG &DAG);

9
lib/Target/X86/X86InstrInfo.td
View File

@ -57,8 +57,6 @@ def SDT_X86EHRET : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
def SDT_X86TCRET : SDTypeProfile<0, 2, [SDTCisPtrTy<0>, SDTCisVT<1, i32>]>;
def SDT_X86TRAP : SDTypeProfile<0, 0, []>;
def X86bsf : SDNode<"X86ISD::BSF", SDTIntUnaryOp>;
def X86bsr : SDNode<"X86ISD::BSR", SDTIntUnaryOp>;
def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>;
@ -109,8 +107,9 @@ def X86ehret : SDNode<"X86ISD::EH_RETURN", SDT_X86EHRET,
def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET,
[SDNPHasChain, SDNPOptInFlag]>;
def X86trap : SDNode<"X86ISD::TRAP", SDT_X86TRAP,
[SDNPHasChain, SDNPOutFlag, SDNPSideEffect]>;
def SDT_TRAP : SDTypeProfile<0, 0, []>;
def trap : SDNode<"ISD::TRAP", SDT_TRAP,
[SDNPHasChain, SDNPOutFlag, SDNPSideEffect]>;
//===----------------------------------------------------------------------===//
// X86 Operand Definitions.
@ -490,7 +489,7 @@ def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)]>,
TB;
let isBarrier = 1, hasCtrlDep = 1 in {
def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(X86trap)]>, TB;
def TRAP : I<0x0B, RawFrm, (outs), (ins), "ud2", [(trap)]>, TB;
}
//===----------------------------------------------------------------------===//