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Legalize FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21606 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-04-28 21:44:33 +00:00
parent 7f64464ff1
commit da6ba87d23
1 changed files with 13 additions and 0 deletions
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13
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -990,6 +990,9 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
// Unary operators
case ISD::FABS:
case ISD::FNEG:
case ISD::FSQRT:
case ISD::FSIN:
case ISD::FCOS:
Tmp1 = LegalizeOp(Node->getOperand(0));
switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
case TargetLowering::Legal:
@ -1335,6 +1338,16 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
// precision, and these operations don't modify precision at all.
break;
case ISD::FSQRT:
case ISD::FSIN:
case ISD::FCOS:
Tmp1 = PromoteOp(Node->getOperand(0));
assert(Tmp1.getValueType() == NVT);
Result = DAG.getNode(Node->getOpcode(), NVT, Tmp1);
if(NoExcessFPPrecision)
Result = DAG.getNode(ISD::FP_ROUND_INREG, NVT, Result, VT);
break;
case ISD::AND:
case ISD::OR:
case ISD::XOR: