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Avoid creating two TargetLowering objects for each target.
Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -39,15 +39,13 @@ namespace {
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class ARMDAGToDAGISel : public SelectionDAGISel {
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class ARMDAGToDAGISel : public SelectionDAGISel {
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ARMTargetMachine &TM;
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ARMTargetMachine &TM;
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ARMTargetLowering ARMLowering;
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/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
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/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
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/// make the right decision when generating code for different targets.
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/// make the right decision when generating code for different targets.
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const ARMSubtarget *Subtarget;
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const ARMSubtarget *Subtarget;
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public:
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public:
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explicit ARMDAGToDAGISel(ARMTargetMachine &tm)
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explicit ARMDAGToDAGISel(ARMTargetMachine &tm)
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: SelectionDAGISel(ARMLowering), TM(tm), ARMLowering(tm),
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: SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
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Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
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Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
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}
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}
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@ -40,8 +40,6 @@ namespace {
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/// AlphaDAGToDAGISel - Alpha specific code to select Alpha machine
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/// AlphaDAGToDAGISel - Alpha specific code to select Alpha machine
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/// instructions for SelectionDAG operations.
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/// instructions for SelectionDAG operations.
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class AlphaDAGToDAGISel : public SelectionDAGISel {
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class AlphaDAGToDAGISel : public SelectionDAGISel {
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AlphaTargetLowering AlphaLowering;
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static const int64_t IMM_LOW = -32768;
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static const int64_t IMM_LOW = -32768;
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static const int64_t IMM_HIGH = 32767;
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static const int64_t IMM_HIGH = 32767;
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static const int64_t IMM_MULT = 65536;
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static const int64_t IMM_MULT = 65536;
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@ -147,8 +145,7 @@ namespace {
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public:
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public:
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explicit AlphaDAGToDAGISel(AlphaTargetMachine &TM)
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explicit AlphaDAGToDAGISel(AlphaTargetMachine &TM)
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: SelectionDAGISel(AlphaLowering),
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: SelectionDAGISel(*TM.getTargetLowering())
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AlphaLowering(*TM.getTargetLowering())
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{}
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{}
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/// getI64Imm - Return a target constant with the specified value, of type
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/// getI64Imm - Return a target constant with the specified value, of type
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@ -37,11 +37,10 @@ namespace {
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/// instructions for SelectionDAG operations.
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/// instructions for SelectionDAG operations.
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///
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///
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class IA64DAGToDAGISel : public SelectionDAGISel {
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class IA64DAGToDAGISel : public SelectionDAGISel {
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IA64TargetLowering IA64Lowering;
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unsigned GlobalBaseReg;
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unsigned GlobalBaseReg;
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public:
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public:
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explicit IA64DAGToDAGISel(IA64TargetMachine &TM)
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explicit IA64DAGToDAGISel(IA64TargetMachine &TM)
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: SelectionDAGISel(IA64Lowering), IA64Lowering(*TM.getTargetLowering()) {}
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: SelectionDAGISel(*TM.getTargetLowering()) {}
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virtual bool runOnFunction(Function &Fn) {
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virtual bool runOnFunction(Function &Fn) {
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// Make sure we re-emit a set of the global base reg if necessary
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// Make sure we re-emit a set of the global base reg if necessary
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@ -52,19 +52,14 @@ class VISIBILITY_HIDDEN MipsDAGToDAGISel : public SelectionDAGISel {
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/// TM - Keep a reference to MipsTargetMachine.
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/// TM - Keep a reference to MipsTargetMachine.
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MipsTargetMachine &TM;
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MipsTargetMachine &TM;
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/// MipsLowering - This object fully describes how to lower LLVM code to an
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/// Mips-specific SelectionDAG.
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MipsTargetLowering MipsLowering;
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/// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
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/// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
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/// make the right decision when generating code for different targets.
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/// make the right decision when generating code for different targets.
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const MipsSubtarget &Subtarget;
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const MipsSubtarget &Subtarget;
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public:
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public:
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explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
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explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
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SelectionDAGISel(MipsLowering),
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SelectionDAGISel(*tm.getTargetLowering()),
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TM(tm), MipsLowering(*TM.getTargetLowering()),
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TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
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Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
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virtual void InstructionSelect();
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virtual void InstructionSelect();
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@ -51,14 +51,10 @@ class VISIBILITY_HIDDEN PIC16DAGToDAGISel : public SelectionDAGISel {
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/// TM - Keep a reference to PIC16TargetMachine.
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/// TM - Keep a reference to PIC16TargetMachine.
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PIC16TargetMachine &TM;
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PIC16TargetMachine &TM;
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/// PIC16Lowering - This object fully describes how to lower LLVM code to an
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/// PIC16-specific SelectionDAG.
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PIC16TargetLowering PIC16Lowering;
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public:
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public:
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explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
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explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
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SelectionDAGISel(PIC16Lowering),
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SelectionDAGISel(*tm.getTargetLowering()),
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TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
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TM(tm) {}
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virtual void InstructionSelect();
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virtual void InstructionSelect();
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@ -41,12 +41,12 @@ namespace {
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///
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///
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class VISIBILITY_HIDDEN PPCDAGToDAGISel : public SelectionDAGISel {
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class VISIBILITY_HIDDEN PPCDAGToDAGISel : public SelectionDAGISel {
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PPCTargetMachine &TM;
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PPCTargetMachine &TM;
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PPCTargetLowering PPCLowering;
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PPCTargetLowering &PPCLowering;
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const PPCSubtarget &PPCSubTarget;
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const PPCSubtarget &PPCSubTarget;
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unsigned GlobalBaseReg;
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unsigned GlobalBaseReg;
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public:
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public:
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explicit PPCDAGToDAGISel(PPCTargetMachine &tm)
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explicit PPCDAGToDAGISel(PPCTargetMachine &tm)
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: SelectionDAGISel(PPCLowering), TM(tm),
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: SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
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PPCLowering(*TM.getTargetLowering()),
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PPCLowering(*TM.getTargetLowering()),
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PPCSubTarget(*TM.getSubtargetImpl()) {}
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PPCSubTarget(*TM.getSubtargetImpl()) {}
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@ -21,9 +21,10 @@
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namespace llvm {
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namespace llvm {
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class FunctionPass;
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class FunctionPass;
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class TargetMachine;
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class TargetMachine;
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class SparcTargetMachine;
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class raw_ostream;
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class raw_ostream;
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FunctionPass *createSparcISelDag(TargetMachine &TM);
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FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
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FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM);
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FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM);
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FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
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FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
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FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
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FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
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@ -29,14 +29,12 @@ using namespace llvm;
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///
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///
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namespace {
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namespace {
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class SparcDAGToDAGISel : public SelectionDAGISel {
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class SparcDAGToDAGISel : public SelectionDAGISel {
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SparcTargetLowering Lowering;
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/// Subtarget - Keep a pointer to the Sparc Subtarget around so that we can
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/// Subtarget - Keep a pointer to the Sparc Subtarget around so that we can
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/// make the right decision when generating code for different targets.
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/// make the right decision when generating code for different targets.
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const SparcSubtarget &Subtarget;
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const SparcSubtarget &Subtarget;
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public:
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public:
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explicit SparcDAGToDAGISel(TargetMachine &TM)
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explicit SparcDAGToDAGISel(SparcTargetMachine &TM)
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: SelectionDAGISel(Lowering), Lowering(TM),
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: SelectionDAGISel(*TM.getTargetLowering()),
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Subtarget(TM.getSubtarget<SparcSubtarget>()) {
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Subtarget(TM.getSubtarget<SparcSubtarget>()) {
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}
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}
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@ -189,6 +187,6 @@ SDNode *SparcDAGToDAGISel::Select(SDValue Op) {
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/// createSparcISelDag - This pass converts a legalized DAG into a
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/// createSparcISelDag - This pass converts a legalized DAG into a
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/// SPARC-specific DAG, ready for instruction scheduling.
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/// SPARC-specific DAG, ready for instruction scheduling.
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///
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///
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FunctionPass *llvm::createSparcISelDag(TargetMachine &TM) {
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FunctionPass *llvm::createSparcISelDag(SparcTargetMachine &TM) {
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return new SparcDAGToDAGISel(TM);
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return new SparcDAGToDAGISel(TM);
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}
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}
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@ -30,7 +30,7 @@ const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
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///
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///
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SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
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SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
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: DataLayout("E-p:32:32-f128:128:128"),
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: DataLayout("E-p:32:32-f128:128:128"),
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Subtarget(M, FS), InstrInfo(Subtarget),
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Subtarget(M, FS), TLInfo(*this), InstrInfo(Subtarget),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
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FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
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}
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}
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@ -19,6 +19,7 @@
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "SparcInstrInfo.h"
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#include "SparcInstrInfo.h"
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#include "SparcSubtarget.h"
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#include "SparcSubtarget.h"
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#include "SparcISelLowering.h"
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namespace llvm {
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namespace llvm {
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@ -27,6 +28,7 @@ class Module;
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class SparcTargetMachine : public LLVMTargetMachine {
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class SparcTargetMachine : public LLVMTargetMachine {
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const TargetData DataLayout; // Calculates type size & alignment
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const TargetData DataLayout; // Calculates type size & alignment
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SparcSubtarget Subtarget;
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SparcSubtarget Subtarget;
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SparcTargetLowering TLInfo;
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SparcInstrInfo InstrInfo;
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SparcInstrInfo InstrInfo;
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TargetFrameInfo FrameInfo;
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TargetFrameInfo FrameInfo;
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@ -42,6 +44,9 @@ public:
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virtual const SparcRegisterInfo *getRegisterInfo() const {
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virtual const SparcRegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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return &InstrInfo.getRegisterInfo();
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}
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}
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virtual SparcTargetLowering* getTargetLowering() const {
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return const_cast<SparcTargetLowering*>(&TLInfo);
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}
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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static unsigned getModuleMatchQuality(const Module &M);
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static unsigned getModuleMatchQuality(const Module &M);
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@ -113,7 +113,7 @@ namespace {
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/// X86Lowering - This object fully describes how to lower LLVM code to an
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/// X86Lowering - This object fully describes how to lower LLVM code to an
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/// X86-specific SelectionDAG.
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/// X86-specific SelectionDAG.
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X86TargetLowering X86Lowering;
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X86TargetLowering &X86Lowering;
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/// Subtarget - Keep a pointer to the X86Subtarget around so that we can
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/// Subtarget - Keep a pointer to the X86Subtarget around so that we can
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/// make the right decision when generating code for different targets.
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/// make the right decision when generating code for different targets.
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@ -129,7 +129,7 @@ namespace {
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public:
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public:
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X86DAGToDAGISel(X86TargetMachine &tm, bool fast)
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X86DAGToDAGISel(X86TargetMachine &tm, bool fast)
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: SelectionDAGISel(X86Lowering, fast),
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: SelectionDAGISel(*tm.getTargetLowering(), fast),
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TM(tm), X86Lowering(*TM.getTargetLowering()),
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TM(tm), X86Lowering(*TM.getTargetLowering()),
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Subtarget(&TM.getSubtarget<X86Subtarget>()),
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Subtarget(&TM.getSubtarget<X86Subtarget>()),
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OptForSize(false) {}
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OptForSize(false) {}
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