6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-22 10:29:35 +00:00
Code Issues Projects Releases Wiki Activity

On Darwin x86_64 small code model doesn't guarantee code address fits in 32-bit.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72734 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-06-02 20:09:31 +00:00
parent d8cf40372e
commit da9863fa41
5 changed files with 18 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/X86/X86Instr64bit.td
View File

@ -1399,16 +1399,16 @@ def : Pat<(i64 (X86Wrapper texternalsym:$dst)),
def : Pat<(store (i64 (X86Wrapper tconstpool:$src)), addr:$dst),
(MOV64mi32 addr:$dst, tconstpool:$src)>,
Requires<[SmallCode, IsStatic]>;
Requires<[SmallCode, IsStatic, IsNotDarwin]>;
def : Pat<(store (i64 (X86Wrapper tjumptable:$src)), addr:$dst),
(MOV64mi32 addr:$dst, tjumptable:$src)>,
Requires<[SmallCode, IsStatic]>;
Requires<[SmallCode, IsStatic, IsNotDarwin]>;
def : Pat<(store (i64 (X86Wrapper tglobaladdr:$src)), addr:$dst),
(MOV64mi32 addr:$dst, tglobaladdr:$src)>,
Requires<[SmallCode, IsStatic]>;
Requires<[SmallCode, IsStatic, IsNotDarwin]>;
def : Pat<(store (i64 (X86Wrapper texternalsym:$src)), addr:$dst),
(MOV64mi32 addr:$dst, texternalsym:$src)>,
Requires<[SmallCode, IsStatic]>;
Requires<[SmallCode, IsStatic, IsNotDarwin]>;
// Calls
// Direct PC relative function call for small code model. 32-bit displacement

1
lib/Target/X86/X86InstrInfo.td
View File

@ -237,6 +237,7 @@ def IsStatic : Predicate<"TM.getRelocationModel() == Reloc::Static">;
def OptForSpeed : Predicate<"!OptForSize">;
def FastBTMem : Predicate<"!Subtarget->isBTMemSlow()">;
def CallImmAddr : Predicate<"Subtarget->IsLegalToCallImmediateAddr(TM)">;
def IsNotDarwin : Predicate<"!Subtarget->isTargetDarwin()">;
//===----------------------------------------------------------------------===//
// X86 Instruction Format Definitions.

4
test/CodeGen/X86/abi-isel.ll
View File

@ -146,7 +146,7 @@
; RUN: grep movl %t | count 91
; RUN: not grep addl %t
; RUN: not grep subl %t
; RUN: grep leaq %t | count 70
; RUN: grep leaq %t | count 81
; RUN: grep movq %t | count 56
; RUN: grep addq %t | count 20
; RUN: grep subq %t | count 14
@ -160,7 +160,7 @@
; RUN: not grep @PLT %t
; RUN: not grep @PLTOFF %t
; RUN: grep {call \\\*} %t | count 10
; RUN: grep {%rip} %t | count 139
; RUN: grep {%rip} %t | count 150
; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small > %t
; RUN: not grep leal %t
; RUN: grep movl %t | count 95

2
test/CodeGen/X86/ga-offset.ll
View File

@ -2,7 +2,7 @@
; RUN: not grep lea %t
; RUN: not grep add %t
; RUN: grep mov %t | count 1
; RUN: llvm-as < %s | llc -march=x86-64 -relocation-model=static > %t
; RUN: llvm-as < %s | llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=static > %t
; RUN: not grep lea %t
; RUN: not grep add %t
; RUN: grep mov %t | count 1

10
test/CodeGen/X86/x86-store-gv-addr.ll Normal file
View File

@ -0,0 +1,10 @@
; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin -relocation-model=static | grep lea
; RUN: llvm-as < %s | llc -mtriple=x86_64-pc-linux-gnu -relocation-model=static | not grep lea
@v = external global i32, align 8
@v_addr = external global i32*, align 8
define void @t() nounwind optsize {
store i32* @v, i32** @v_addr, align 8
unreachable
}