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DAGCombiner: Make concat_vector combine safe for EVTs and concat_vectors with many arguments.

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PR20677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216175 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2014-08-21 13:28:02 +00:00
parent 47199c3d0c
commit daada81e5c
3 changed files with 24 additions and 1 deletions
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7
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -4689,12 +4689,17 @@ static SDValue ConvertSelectToConcatVector(SDNode *N, SelectionDAG &DAG) {
SDValue Cond = N->getOperand(0);
SDValue LHS = N->getOperand(1);
SDValue RHS = N->getOperand(2);
MVT VT = N->getSimpleValueType(0);
EVT VT = N->getValueType(0);
int NumElems = VT.getVectorNumElements();
assert(LHS.getOpcode() == ISD::CONCAT_VECTORS &&
RHS.getOpcode() == ISD::CONCAT_VECTORS &&
Cond.getOpcode() == ISD::BUILD_VECTOR);
// CONCAT_VECTOR can take an arbitrary number of arguments. We only care about
// binary ones here.
if (LHS->getNumOperands() != 2 || RHS->getNumOperands() != 2)
return SDValue();
// We're sure we have an even number of elements due to the
// concat_vectors we have as arguments to vselect.
// Skip BV elements until we find one that's not an UNDEF

9
test/CodeGen/X86/avx512-select.ll
View File

@ -39,3 +39,12 @@ define double @select03(double %a, double %b, double %c, double %eps) {
%cond = select i1 %cmp, double %c, double %b
ret double %cond
}
; CHECK-LABEL: @select04
; CHECK: vmovaps %zmm3, %zmm1
; CHECK-NEXT: ret
; PR20677
define <16 x double> @select04(<16 x double> %a, <16 x double> %b) {
%sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b
ret <16 x double> %sel
}

9
test/CodeGen/X86/vselect.ll
View File

@ -276,3 +276,12 @@ define <4 x float> @select_of_shuffles_0(<2 x float> %a0, <2 x float> %b0, <2 x
%7 = fsub <4 x float> %3, %6
ret <4 x float> %7
}
; CHECK-LABEL: @select_illegal
; CHECK: mov
; CHECK: ret
; PR20677
define <16 x double> @select_illegal(<16 x double> %a, <16 x double> %b) {
%sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b
ret <16 x double> %sel
}