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[MC] Split MCBinaryExpr::Shr into LShr and AShr.
Defaulting to AShr without consulting the target MCAsmInfo isn't OK. Add a flag to fix that. Keep it off for now: target migrations will follow in separate commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235951 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -339,7 +339,7 @@ protected:
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std::vector<MCCFIInstruction> InitialFrameState;
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//===--- Integrated Assembler State ----------------------------------===//
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//===--- Integrated Assembler Information ----------------------------===//
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/// Should we use the integrated assembler?
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/// The integrated assembler should be enabled by default (by the
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@ -351,6 +351,10 @@ protected:
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/// Compress DWARF debug sections. Defaults to false.
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bool CompressDebugSections;
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/// True if the integrated assembler should interpret 'a >> b' constant
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/// expressions as logical rather than arithmetic.
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bool UseLogicalShr;
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public:
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explicit MCAsmInfo();
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virtual ~MCAsmInfo();
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@ -538,6 +542,8 @@ public:
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void setCompressDebugSections(bool CompressDebugSections) {
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this->CompressDebugSections = CompressDebugSections;
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}
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bool shouldUseLogicalShr() const { return UseLogicalShr; }
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};
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}
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@ -413,7 +413,8 @@ public:
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NE, ///< Inequality comparison.
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Or, ///< Bitwise or.
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Shl, ///< Shift left.
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Shr, ///< Shift right (arithmetic or logical, depending on target)
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AShr, ///< Arithmetic shift right.
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LShr, ///< Logical shift right.
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Sub, ///< Subtraction.
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Xor ///< Bitwise exclusive or.
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};
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@ -491,9 +492,13 @@ public:
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MCContext &Ctx) {
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return Create(Shl, LHS, RHS, Ctx);
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}
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static const MCBinaryExpr *CreateShr(const MCExpr *LHS, const MCExpr *RHS,
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static const MCBinaryExpr *CreateAShr(const MCExpr *LHS, const MCExpr *RHS,
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MCContext &Ctx) {
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return Create(Shr, LHS, RHS, Ctx);
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return Create(AShr, LHS, RHS, Ctx);
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}
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static const MCBinaryExpr *CreateLShr(const MCExpr *LHS, const MCExpr *RHS,
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MCContext &Ctx) {
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return Create(LShr, LHS, RHS, Ctx);
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}
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static const MCBinaryExpr *CreateSub(const MCExpr *LHS, const MCExpr *RHS,
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MCContext &Ctx) {
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@ -90,6 +90,7 @@ MCAsmInfo::MCAsmInfo() {
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DwarfRegNumForCFI = false;
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NeedsDwarfSectionOffsetDirective = false;
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UseParensForSymbolVariant = false;
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UseLogicalShr = false;
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// FIXME: Clang's logic should be synced with the logic used to initialize
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// this member and the two implementations should be merged.
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@ -89,6 +89,7 @@ void MCExpr::print(raw_ostream &OS) const {
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OS << '+';
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break;
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case MCBinaryExpr::AShr: OS << ">>"; break;
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case MCBinaryExpr::And: OS << '&'; break;
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case MCBinaryExpr::Div: OS << '/'; break;
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case MCBinaryExpr::EQ: OS << "=="; break;
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@ -96,6 +97,7 @@ void MCExpr::print(raw_ostream &OS) const {
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case MCBinaryExpr::GTE: OS << ">="; break;
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case MCBinaryExpr::LAnd: OS << "&&"; break;
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case MCBinaryExpr::LOr: OS << "||"; break;
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case MCBinaryExpr::LShr: OS << ">>"; break;
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case MCBinaryExpr::LT: OS << '<'; break;
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case MCBinaryExpr::LTE: OS << "<="; break;
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case MCBinaryExpr::Mod: OS << '%'; break;
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@ -103,7 +105,6 @@ void MCExpr::print(raw_ostream &OS) const {
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case MCBinaryExpr::NE: OS << "!="; break;
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case MCBinaryExpr::Or: OS << '|'; break;
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case MCBinaryExpr::Shl: OS << "<<"; break;
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case MCBinaryExpr::Shr: OS << ">>"; break;
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case MCBinaryExpr::Sub: OS << '-'; break;
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case MCBinaryExpr::Xor: OS << '^'; break;
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}
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@ -709,11 +710,12 @@ bool MCExpr::EvaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm,
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}
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// FIXME: We need target hooks for the evaluation. It may be limited in
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// width, and gas defines the result of comparisons and right shifts
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// differently from Apple as.
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// width, and gas defines the result of comparisons differently from
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// Apple as.
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int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant();
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int64_t Result = 0;
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switch (ABE->getOpcode()) {
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case MCBinaryExpr::AShr: Result = LHS >> RHS; break;
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case MCBinaryExpr::Add: Result = LHS + RHS; break;
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case MCBinaryExpr::And: Result = LHS & RHS; break;
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case MCBinaryExpr::Div: Result = LHS / RHS; break;
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@ -722,6 +724,7 @@ bool MCExpr::EvaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm,
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case MCBinaryExpr::GTE: Result = LHS >= RHS; break;
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case MCBinaryExpr::LAnd: Result = LHS && RHS; break;
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case MCBinaryExpr::LOr: Result = LHS || RHS; break;
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case MCBinaryExpr::LShr: Result = uint64_t(LHS) >> uint64_t(RHS); break;
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case MCBinaryExpr::LT: Result = LHS < RHS; break;
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case MCBinaryExpr::LTE: Result = LHS <= RHS; break;
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case MCBinaryExpr::Mod: Result = LHS % RHS; break;
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@ -729,7 +732,6 @@ bool MCExpr::EvaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm,
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case MCBinaryExpr::NE: Result = LHS != RHS; break;
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case MCBinaryExpr::Or: Result = LHS | RHS; break;
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case MCBinaryExpr::Shl: Result = LHS << RHS; break;
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case MCBinaryExpr::Shr: Result = LHS >> RHS; break;
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case MCBinaryExpr::Sub: Result = LHS - RHS; break;
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case MCBinaryExpr::Xor: Result = LHS ^ RHS; break;
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}
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@ -1128,7 +1128,7 @@ unsigned AsmParser::getBinOpPrecedence(AsmToken::TokenKind K,
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Kind = MCBinaryExpr::Shl;
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return 4;
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case AsmToken::GreaterGreater:
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Kind = MCBinaryExpr::Shr;
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Kind = MAI.shouldUseLogicalShr() ? MCBinaryExpr::LShr : MCBinaryExpr::AShr;
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return 4;
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// High Intermediate Precedence: +, -
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