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[MC] Split MCBinaryExpr::Shr into LShr and AShr.

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Defaulting to AShr without consulting the target MCAsmInfo isn't OK.
Add a flag to fix that.  Keep it off for now: target migrations will
follow in separate commits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235951 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ahmed Bougacha 2015-04-28 00:21:32 +00:00
parent 07bcfe929e
commit dac39b1fef
5 changed files with 23 additions and 9 deletions
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8
include/llvm/MC/MCAsmInfo.h
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@ -339,7 +339,7 @@ protected:
std::vector<MCCFIInstruction> InitialFrameState;
//===--- Integrated Assembler State ----------------------------------===//
//===--- Integrated Assembler Information ----------------------------===//
/// Should we use the integrated assembler?
/// The integrated assembler should be enabled by default (by the
@ -351,6 +351,10 @@ protected:
/// Compress DWARF debug sections. Defaults to false.
bool CompressDebugSections;
/// True if the integrated assembler should interpret 'a >> b' constant
/// expressions as logical rather than arithmetic.
bool UseLogicalShr;
public:
explicit MCAsmInfo();
virtual ~MCAsmInfo();
@ -538,6 +542,8 @@ public:
void setCompressDebugSections(bool CompressDebugSections) {
this->CompressDebugSections = CompressDebugSections;
}
bool shouldUseLogicalShr() const { return UseLogicalShr; }
};
}

11
include/llvm/MC/MCExpr.h
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@ -413,7 +413,8 @@ public:
NE, ///< Inequality comparison.
Or, ///< Bitwise or.
Shl, ///< Shift left.
Shr, ///< Shift right (arithmetic or logical, depending on target)
AShr, ///< Arithmetic shift right.
LShr, ///< Logical shift right.
Sub, ///< Subtraction.
Xor ///< Bitwise exclusive or.
};
@ -491,9 +492,13 @@ public:
MCContext &Ctx) {
return Create(Shl, LHS, RHS, Ctx);
}
static const MCBinaryExpr *CreateShr(const MCExpr *LHS, const MCExpr *RHS,
static const MCBinaryExpr *CreateAShr(const MCExpr *LHS, const MCExpr *RHS,
MCContext &Ctx) {
return Create(Shr, LHS, RHS, Ctx);
return Create(AShr, LHS, RHS, Ctx);
}
static const MCBinaryExpr *CreateLShr(const MCExpr *LHS, const MCExpr *RHS,
MCContext &Ctx) {
return Create(LShr, LHS, RHS, Ctx);
}
static const MCBinaryExpr *CreateSub(const MCExpr *LHS, const MCExpr *RHS,
MCContext &Ctx) {

1
lib/MC/MCAsmInfo.cpp
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@ -90,6 +90,7 @@ MCAsmInfo::MCAsmInfo() {
DwarfRegNumForCFI = false;
NeedsDwarfSectionOffsetDirective = false;
UseParensForSymbolVariant = false;
UseLogicalShr = false;
// FIXME: Clang's logic should be synced with the logic used to initialize
// this member and the two implementations should be merged.

10
lib/MC/MCExpr.cpp
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@ -89,6 +89,7 @@ void MCExpr::print(raw_ostream &OS) const {
OS << '+';
break;
case MCBinaryExpr::AShr: OS << ">>"; break;
case MCBinaryExpr::And: OS << '&'; break;
case MCBinaryExpr::Div: OS << '/'; break;
case MCBinaryExpr::EQ: OS << "=="; break;
@ -96,6 +97,7 @@ void MCExpr::print(raw_ostream &OS) const {
case MCBinaryExpr::GTE: OS << ">="; break;
case MCBinaryExpr::LAnd: OS << "&&"; break;
case MCBinaryExpr::LOr: OS << "||"; break;
case MCBinaryExpr::LShr: OS << ">>"; break;
case MCBinaryExpr::LT: OS << '<'; break;
case MCBinaryExpr::LTE: OS << "<="; break;
case MCBinaryExpr::Mod: OS << '%'; break;
@ -103,7 +105,6 @@ void MCExpr::print(raw_ostream &OS) const {
case MCBinaryExpr::NE: OS << "!="; break;
case MCBinaryExpr::Or: OS << '|'; break;
case MCBinaryExpr::Shl: OS << "<<"; break;
case MCBinaryExpr::Shr: OS << ">>"; break;
case MCBinaryExpr::Sub: OS << '-'; break;
case MCBinaryExpr::Xor: OS << '^'; break;
}
@ -709,11 +710,12 @@ bool MCExpr::EvaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm,
}
// FIXME: We need target hooks for the evaluation. It may be limited in
// width, and gas defines the result of comparisons and right shifts
// differently from Apple as.
// width, and gas defines the result of comparisons differently from
// Apple as.
int64_t LHS = LHSValue.getConstant(), RHS = RHSValue.getConstant();
int64_t Result = 0;
switch (ABE->getOpcode()) {
case MCBinaryExpr::AShr: Result = LHS >> RHS; break;
case MCBinaryExpr::Add: Result = LHS + RHS; break;
case MCBinaryExpr::And: Result = LHS & RHS; break;
case MCBinaryExpr::Div: Result = LHS / RHS; break;
@ -722,6 +724,7 @@ bool MCExpr::EvaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm,
case MCBinaryExpr::GTE: Result = LHS >= RHS; break;
case MCBinaryExpr::LAnd: Result = LHS && RHS; break;
case MCBinaryExpr::LOr: Result = LHS || RHS; break;
case MCBinaryExpr::LShr: Result = uint64_t(LHS) >> uint64_t(RHS); break;
case MCBinaryExpr::LT: Result = LHS < RHS; break;
case MCBinaryExpr::LTE: Result = LHS <= RHS; break;
case MCBinaryExpr::Mod: Result = LHS % RHS; break;
@ -729,7 +732,6 @@ bool MCExpr::EvaluateAsRelocatableImpl(MCValue &Res, const MCAssembler *Asm,
case MCBinaryExpr::NE: Result = LHS != RHS; break;
case MCBinaryExpr::Or: Result = LHS | RHS; break;
case MCBinaryExpr::Shl: Result = LHS << RHS; break;
case MCBinaryExpr::Shr: Result = LHS >> RHS; break;
case MCBinaryExpr::Sub: Result = LHS - RHS; break;
case MCBinaryExpr::Xor: Result = LHS ^ RHS; break;
}

2
lib/MC/MCParser/AsmParser.cpp
View File

@ -1128,7 +1128,7 @@ unsigned AsmParser::getBinOpPrecedence(AsmToken::TokenKind K,
Kind = MCBinaryExpr::Shl;
return 4;
case AsmToken::GreaterGreater:
Kind = MCBinaryExpr::Shr;
Kind = MAI.shouldUseLogicalShr() ? MCBinaryExpr::LShr : MCBinaryExpr::AShr;
return 4;
// High Intermediate Precedence: +, -