mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Move this code to a common place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth
@@ -1330,3 +1330,268 @@ bool TargetLowering::isLegalAddressImmediate(int64_t V) const {
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bool TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const {
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return false;
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}
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// Magic for divide replacement
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struct ms {
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int64_t m; // magic number
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int64_t s; // shift amount
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};
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struct mu {
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uint64_t m; // magic number
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int64_t a; // add indicator
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int64_t s; // shift amount
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};
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/// magic - calculate the magic numbers required to codegen an integer sdiv as
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/// a sequence of multiply and shifts. Requires that the divisor not be 0, 1,
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/// or -1.
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static ms magic32(int32_t d) {
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int32_t p;
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uint32_t ad, anc, delta, q1, r1, q2, r2, t;
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const uint32_t two31 = 0x80000000U;
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struct ms mag;
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ad = abs(d);
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t = two31 + ((uint32_t)d >> 31);
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anc = t - 1 - t%ad; // absolute value of nc
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p = 31; // initialize p
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q1 = two31/anc; // initialize q1 = 2p/abs(nc)
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r1 = two31 - q1*anc; // initialize r1 = rem(2p,abs(nc))
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q2 = two31/ad; // initialize q2 = 2p/abs(d)
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r2 = two31 - q2*ad; // initialize r2 = rem(2p,abs(d))
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do {
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p = p + 1;
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q1 = 2*q1; // update q1 = 2p/abs(nc)
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r1 = 2*r1; // update r1 = rem(2p/abs(nc))
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if (r1 >= anc) { // must be unsigned comparison
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q1 = q1 + 1;
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r1 = r1 - anc;
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}
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q2 = 2*q2; // update q2 = 2p/abs(d)
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r2 = 2*r2; // update r2 = rem(2p/abs(d))
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if (r2 >= ad) { // must be unsigned comparison
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q2 = q2 + 1;
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r2 = r2 - ad;
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}
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delta = ad - r2;
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} while (q1 < delta || (q1 == delta && r1 == 0));
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mag.m = (int32_t)(q2 + 1); // make sure to sign extend
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if (d < 0) mag.m = -mag.m; // resulting magic number
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mag.s = p - 32; // resulting shift
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return mag;
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}
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/// magicu - calculate the magic numbers required to codegen an integer udiv as
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/// a sequence of multiply, add and shifts. Requires that the divisor not be 0.
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static mu magicu32(uint32_t d) {
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int32_t p;
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uint32_t nc, delta, q1, r1, q2, r2;
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struct mu magu;
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magu.a = 0; // initialize "add" indicator
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nc = - 1 - (-d)%d;
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p = 31; // initialize p
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q1 = 0x80000000/nc; // initialize q1 = 2p/nc
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r1 = 0x80000000 - q1*nc; // initialize r1 = rem(2p,nc)
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q2 = 0x7FFFFFFF/d; // initialize q2 = (2p-1)/d
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r2 = 0x7FFFFFFF - q2*d; // initialize r2 = rem((2p-1),d)
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do {
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p = p + 1;
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if (r1 >= nc - r1 ) {
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q1 = 2*q1 + 1; // update q1
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r1 = 2*r1 - nc; // update r1
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}
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else {
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q1 = 2*q1; // update q1
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r1 = 2*r1; // update r1
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}
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if (r2 + 1 >= d - r2) {
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if (q2 >= 0x7FFFFFFF) magu.a = 1;
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q2 = 2*q2 + 1; // update q2
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r2 = 2*r2 + 1 - d; // update r2
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}
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else {
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if (q2 >= 0x80000000) magu.a = 1;
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q2 = 2*q2; // update q2
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r2 = 2*r2 + 1; // update r2
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}
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delta = d - 1 - r2;
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} while (p < 64 && (q1 < delta || (q1 == delta && r1 == 0)));
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magu.m = q2 + 1; // resulting magic number
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magu.s = p - 32; // resulting shift
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return magu;
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}
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/// magic - calculate the magic numbers required to codegen an integer sdiv as
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/// a sequence of multiply and shifts. Requires that the divisor not be 0, 1,
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/// or -1.
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static ms magic64(int64_t d) {
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int64_t p;
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uint64_t ad, anc, delta, q1, r1, q2, r2, t;
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const uint64_t two63 = 9223372036854775808ULL; // 2^63
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struct ms mag;
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ad = d >= 0 ? d : -d;
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t = two63 + ((uint64_t)d >> 63);
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anc = t - 1 - t%ad; // absolute value of nc
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p = 63; // initialize p
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q1 = two63/anc; // initialize q1 = 2p/abs(nc)
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r1 = two63 - q1*anc; // initialize r1 = rem(2p,abs(nc))
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q2 = two63/ad; // initialize q2 = 2p/abs(d)
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r2 = two63 - q2*ad; // initialize r2 = rem(2p,abs(d))
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do {
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p = p + 1;
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q1 = 2*q1; // update q1 = 2p/abs(nc)
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r1 = 2*r1; // update r1 = rem(2p/abs(nc))
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if (r1 >= anc) { // must be unsigned comparison
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q1 = q1 + 1;
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r1 = r1 - anc;
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}
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q2 = 2*q2; // update q2 = 2p/abs(d)
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r2 = 2*r2; // update r2 = rem(2p/abs(d))
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if (r2 >= ad) { // must be unsigned comparison
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q2 = q2 + 1;
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r2 = r2 - ad;
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}
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delta = ad - r2;
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} while (q1 < delta || (q1 == delta && r1 == 0));
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mag.m = q2 + 1;
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if (d < 0) mag.m = -mag.m; // resulting magic number
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mag.s = p - 64; // resulting shift
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return mag;
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}
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/// magicu - calculate the magic numbers required to codegen an integer udiv as
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/// a sequence of multiply, add and shifts. Requires that the divisor not be 0.
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static mu magicu64(uint64_t d)
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{
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int64_t p;
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uint64_t nc, delta, q1, r1, q2, r2;
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struct mu magu;
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magu.a = 0; // initialize "add" indicator
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nc = - 1 - (-d)%d;
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p = 63; // initialize p
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q1 = 0x8000000000000000ull/nc; // initialize q1 = 2p/nc
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r1 = 0x8000000000000000ull - q1*nc; // initialize r1 = rem(2p,nc)
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q2 = 0x7FFFFFFFFFFFFFFFull/d; // initialize q2 = (2p-1)/d
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r2 = 0x7FFFFFFFFFFFFFFFull - q2*d; // initialize r2 = rem((2p-1),d)
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do {
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p = p + 1;
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if (r1 >= nc - r1 ) {
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q1 = 2*q1 + 1; // update q1
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r1 = 2*r1 - nc; // update r1
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}
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else {
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q1 = 2*q1; // update q1
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r1 = 2*r1; // update r1
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}
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if (r2 + 1 >= d - r2) {
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if (q2 >= 0x7FFFFFFFFFFFFFFFull) magu.a = 1;
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q2 = 2*q2 + 1; // update q2
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r2 = 2*r2 + 1 - d; // update r2
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}
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else {
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if (q2 >= 0x8000000000000000ull) magu.a = 1;
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q2 = 2*q2; // update q2
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r2 = 2*r2 + 1; // update r2
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}
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delta = d - 1 - r2;
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} while (p < 64 && (q1 < delta || (q1 == delta && r1 == 0)));
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magu.m = q2 + 1; // resulting magic number
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magu.s = p - 64; // resulting shift
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return magu;
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}
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/// BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant,
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/// return a DAG expression to select that will generate the same value by
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/// multiplying by a magic number. See:
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/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
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SDOperand TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
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std::list<SDNode*>* Created) const {
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MVT::ValueType VT = N->getValueType(0);
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// Check to see if we can do this.
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if (!isTypeLegal(VT) || (VT != MVT::i32 && VT != MVT::i64))
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return SDOperand(); // BuildSDIV only operates on i32 or i64
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if (!isOperationLegal(ISD::MULHS, VT))
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return SDOperand(); // Make sure the target supports MULHS.
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int64_t d = cast<ConstantSDNode>(N->getOperand(1))->getSignExtended();
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ms magics = (VT == MVT::i32) ? magic32(d) : magic64(d);
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// Multiply the numerator (operand 0) by the magic value
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SDOperand Q = DAG.getNode(ISD::MULHS, VT, N->getOperand(0),
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DAG.getConstant(magics.m, VT));
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// If d > 0 and m < 0, add the numerator
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if (d > 0 && magics.m < 0) {
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Q = DAG.getNode(ISD::ADD, VT, Q, N->getOperand(0));
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if (Created)
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Created->push_back(Q.Val);
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}
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// If d < 0 and m > 0, subtract the numerator.
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if (d < 0 && magics.m > 0) {
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Q = DAG.getNode(ISD::SUB, VT, Q, N->getOperand(0));
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if (Created)
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Created->push_back(Q.Val);
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}
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// Shift right algebraic if shift value is nonzero
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if (magics.s > 0) {
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Q = DAG.getNode(ISD::SRA, VT, Q,
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DAG.getConstant(magics.s, getShiftAmountTy()));
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if (Created)
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Created->push_back(Q.Val);
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}
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// Extract the sign bit and add it to the quotient
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SDOperand T =
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DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(MVT::getSizeInBits(VT)-1,
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getShiftAmountTy()));
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if (Created)
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Created->push_back(T.Val);
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return DAG.getNode(ISD::ADD, VT, Q, T);
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}
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/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
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/// return a DAG expression to select that will generate the same value by
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/// multiplying by a magic number. See:
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/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
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SDOperand TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG,
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std::list<SDNode*>* Created) const {
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MVT::ValueType VT = N->getValueType(0);
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// Check to see if we can do this.
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if (!isTypeLegal(VT) || (VT != MVT::i32 && VT != MVT::i64))
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return SDOperand(); // BuildUDIV only operates on i32 or i64
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if (!isOperationLegal(ISD::MULHU, VT))
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return SDOperand(); // Make sure the target supports MULHU.
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uint64_t d = cast<ConstantSDNode>(N->getOperand(1))->getValue();
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mu magics = (VT == MVT::i32) ? magicu32(d) : magicu64(d);
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// Multiply the numerator (operand 0) by the magic value
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SDOperand Q = DAG.getNode(ISD::MULHU, VT, N->getOperand(0),
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DAG.getConstant(magics.m, VT));
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if (Created)
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Created->push_back(Q.Val);
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if (magics.a == 0) {
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return DAG.getNode(ISD::SRL, VT, Q,
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DAG.getConstant(magics.s, getShiftAmountTy()));
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} else {
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SDOperand NPQ = DAG.getNode(ISD::SUB, VT, N->getOperand(0), Q);
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if (Created)
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Created->push_back(NPQ.Val);
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NPQ = DAG.getNode(ISD::SRL, VT, NPQ,
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DAG.getConstant(1, getShiftAmountTy()));
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if (Created)
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Created->push_back(NPQ.Val);
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NPQ = DAG.getNode(ISD::ADD, VT, NPQ, Q);
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if (Created)
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Created->push_back(NPQ.Val);
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return DAG.getNode(ISD::SRL, VT, NPQ,
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DAG.getConstant(magics.s-1, getShiftAmountTy()));
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}
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}
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