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Rewrite tblgen handling of subtarget features so
it follows the order of the enum, not alphabetical. The motivation is to make -mattr=+ssse3,+sse41 select SSE41 as it ought to. Added "ignored" enum values of 0 to PPC and SPU to avoid compiler warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47143 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -26,6 +26,7 @@ namespace llvm {
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namespace SPU {
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enum {
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PROC_NONE,
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DEFAULT_PROC
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};
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}
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@ -849,6 +849,7 @@ bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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bool DarwinAsmPrinter::doInitialization(Module &M) {
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static const char *CPUDirectives[] = {
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"",
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"ppc",
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"ppc601",
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"ppc602",
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@ -60,6 +60,7 @@ PPCSubtarget::PPCSubtarget(const TargetMachine &tm, const Module &M,
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const std::string &FS, bool is64Bit)
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: TM(tm)
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, StackAlignment(16)
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, DarwinDirective(PPC::DIR_NONE)
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, IsGigaProcessor(false)
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, Has64BitSupport(false)
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, Use64BitRegs(false)
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@ -27,6 +27,7 @@ namespace llvm {
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namespace PPC {
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// -m directive values.
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enum {
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DIR_NONE,
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DIR_32,
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DIR_601,
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DIR_602,
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@ -482,8 +482,12 @@ void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
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const std::string &Value = R->getValueAsString("Value");
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const std::string &Attribute = R->getValueAsString("Attribute");
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if (Value=="true" || Value=="false")
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OS << " if ((Bits & " << Instance << ") != 0) "
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<< Attribute << " = " << Value << ";\n";
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else
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OS << " if ((Bits & " << Instance << ") != 0 && " << Attribute <<
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" < " << Value << ") " << Attribute << " = " << Value << ";\n";
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}
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if (HasItineraries) {
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