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be slightly more subtle about skipping dbg_value instructions; otherwise, if a
dbg_value immediately follows a sequence of ldr/str instructions that should be combined into an ldm/stm and is the last instruction in the block, then combine may end up being skipped. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105758 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1024,10 +1024,6 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
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RS->enterBasicBlock(&MBB);
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MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
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while (MBBI != E) {
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if (MBBI->isDebugValue()) {
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++MBBI;
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continue;
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}
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if (FixInvalidRegPairOp(MBB, MBBI))
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continue;
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@ -1094,7 +1090,12 @@ bool ARMLoadStoreOpt::LoadStoreMultipleOpti(MachineBasicBlock &MBB) {
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}
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}
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if (Advance) {
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if (MBBI->isDebugValue()) {
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++MBBI;
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if (MBBI == E)
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// Reach the end of the block, try merging the memory instructions.
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TryMerge = true;
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} else if (Advance) {
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++Position;
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++MBBI;
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if (MBBI == E)
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