From db1b5bf5eb4b70ce67b5ae5a0fb77ce9ad922ed1 Mon Sep 17 00:00:00 2001 From: Scott Michel Date: Tue, 9 Dec 2008 06:12:03 +0000 Subject: [PATCH] CellSPU: - Fix call.ll and call_indirect.ll expected results, now that it's using a different pre-register allocation scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60741 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/CellSPU/call.ll | 2 +- test/CodeGen/CellSPU/call_indirect.ll | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/test/CodeGen/CellSPU/call.ll b/test/CodeGen/CellSPU/call.ll index de6ed6b6406..a305a235404 100644 --- a/test/CodeGen/CellSPU/call.ll +++ b/test/CodeGen/CellSPU/call.ll @@ -1,7 +1,7 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: grep brsl %t1.s | count 1 ; RUN: grep brasl %t1.s | count 1 -; RUN: grep stqd %t1.s | count 81 +; RUN: grep stqd %t1.s | count 80 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" diff --git a/test/CodeGen/CellSPU/call_indirect.ll b/test/CodeGen/CellSPU/call_indirect.ll index e1924e83eb1..4b0a957feb2 100644 --- a/test/CodeGen/CellSPU/call_indirect.ll +++ b/test/CodeGen/CellSPU/call_indirect.ll @@ -10,7 +10,7 @@ ; RUN: grep ilhu %t2.s | count 2 ; RUN: grep iohl %t2.s | count 2 ; RUN: grep rotqby %t2.s | count 6 -; RUN: grep lqd %t2.s | count 18 +; RUN: grep lqd %t2.s | count 13 ; RUN: grep ilhu %t2.s | count 2 ; RUN: grep ai %t2.s | count 9 ; RUN: grep dispatch_tab %t2.s | count 6