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go to great lengths to work around a GAS bug my previous patch

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exposed:

GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)"
even though st(0) is implicit in all other fp stack instructions.

Fortunately, there is an alias for fcomip named "fcompi" and gas does
accept the default argument for the alias (boggle!).

As such, switch the canonical form of this instruction to "pi" instead
of "ip".  This makes the code generator and disassembler generate pi,
avoiding the gas bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-11-06 21:37:06 +00:00
parent 8c24b0c699
commit db28788e4a
5 changed files with 20 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/X86/X86InstrFPStack.td
View File

@ -586,13 +586,13 @@ def UCOM_FIr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i)
"fucomi\t$reg">, DB;
def UCOM_FIPr : FPI<0xE8, AddRegFrm, // CC = cmp ST(0) with ST(i), pop
(outs), (ins RST:$reg),
"fucomip\t$reg">, DF;
"fucompi\t$reg">, DF;
}
def COM_FIr : FPI<0xF0, AddRegFrm, (outs), (ins RST:$reg),
"fcomi\t$reg">, DB;
def COM_FIPr : FPI<0xF0, AddRegFrm, (outs), (ins RST:$reg),
"fcomip\t$reg">, DF;
"fcompi\t$reg">, DF;
// Floating point flag ops.
let Defs = [AX] in

12
lib/Target/X86/X86InstrInfo.td
View File

@ -1319,12 +1319,12 @@ def : MnemonicAlias<"fcmova", "fcmovnbe">;
def : MnemonicAlias<"fcmovnae", "fcmovb">;
def : MnemonicAlias<"fcmovna", "fcmovbe">;
def : MnemonicAlias<"fcmovae", "fcmovnb">;
def : MnemonicAlias<"fcompi", "fcomip">;
def : MnemonicAlias<"fcomip", "fcompi">;
def : MnemonicAlias<"fildq", "fildll">;
def : MnemonicAlias<"fldcww", "fldcw">;
def : MnemonicAlias<"fnstcww", "fnstcw">;
def : MnemonicAlias<"fnstsww", "fnstsw">;
def : MnemonicAlias<"fucompi", "fucomip">;
def : MnemonicAlias<"fucomip", "fucompi">;
def : MnemonicAlias<"fwait", "wait">;
@ -1387,11 +1387,11 @@ def : InstAlias<"fdivp", (DIVR_FPrST0 ST1)>;
def : InstAlias<"fdivrp", (DIV_FPrST0 ST1)>;
def : InstAlias<"fxch", (XCH_F ST1)>;
def : InstAlias<"fcomi", (COM_FIr ST1)>;
def : InstAlias<"fcomip", (COM_FIPr ST1)>;
def : InstAlias<"fcompi", (COM_FIPr ST1)>;
def : InstAlias<"fucom", (UCOM_Fr ST1)>;
def : InstAlias<"fucomp", (UCOM_FPr ST1)>;
def : InstAlias<"fucomi", (UCOM_FIr ST1)>;
def : InstAlias<"fucomip", (UCOM_FIPr ST1)>;
def : InstAlias<"fucompi", (UCOM_FIPr ST1)>;
// Handle fmul/fadd/fsub/fdiv instructions with explicitly written st(0) op.
// For example, "fadd %st(4), %st(0)" -> "fadd %st(4)". We also disambiguate
@ -1415,9 +1415,9 @@ defm : FpUnaryAlias<"fdivp", DIVR_FPrST0>;
defm : FpUnaryAlias<"fdivr", DIVR_FST0r>;
defm : FpUnaryAlias<"fdivrp", DIV_FPrST0>;
defm : FpUnaryAlias<"fcomi", COM_FIr>;
defm : FpUnaryAlias<"fcomip", COM_FIPr>;
defm : FpUnaryAlias<"fucomi", UCOM_FIr>;
defm : FpUnaryAlias<"fucomip", UCOM_FIPr>;
defm : FpUnaryAlias<"fcompi", COM_FIPr>;
defm : FpUnaryAlias<"fucompi", UCOM_FIPr>;
// Handle "f{mulp,addp} st(0), $op" the same as "f{mulp,addp} $op", since they

3
test/CodeGen/X86/fp-stack-compare.ll
View File

@ -1,5 +1,4 @@
; RUN: llc < %s -march=x86 -mcpu=i386 | \
; RUN: grep {fucomi.*st.\[12\]}
; RUN: llc < %s -march=x86 -mcpu=i386 | grep {fucompi.*st.\[12\]}
; PR1012
define float @foo(float* %col.2.0) {

8
test/MC/X86/x86-32-coverage.s
View File

@ -4482,11 +4482,11 @@
// CHECK: encoding: [0xdb,0xea]
fucomi %st(2),%st
// CHECK: fcomip %st(2)
// CHECK: fcompi %st(2)
// CHECK: encoding: [0xdf,0xf2]
fcomip %st(2),%st
// CHECK: fucomip %st(2)
// CHECK: fucompi %st(2)
// CHECK: encoding: [0xdf,0xea]
fucomip %st(2),%st
@ -14156,10 +14156,10 @@
// CHECK: fucomi %st(2)
fucomi %st(2),%st
// CHECK: fcomip %st(2)
// CHECK: fcompi %st(2)
fcomip %st(2),%st
// CHECK: fucomip %st(2)
// CHECK: fucompi %st(2)
fucomip %st(2),%st
// CHECK: movnti %ecx, 3735928559(%ebx,%ecx,8)

14
test/MC/X86/x86-32.s
View File

@ -708,27 +708,27 @@ pshufw $90, %mm4, %mm0
// CHECK: encoding: [0x0f,0x01,0x48,0x04]
sidtl 4(%eax)
// CHECK: fcomip %st(2)
// CHECK: fcompi %st(2)
// CHECK: encoding: [0xdf,0xf2]
fcompi %st(2),%st
fcompi %st(2), %st
// CHECK: fcomip %st(2)
// CHECK: fcompi %st(2)
// CHECK: encoding: [0xdf,0xf2]
fcompi %st(2)
// CHECK: fcomip %st(1)
// CHECK: fcompi %st(1)
// CHECK: encoding: [0xdf,0xf1]
fcompi
// CHECK: fucomip %st(2)
// CHECK: fucompi %st(2)
// CHECK: encoding: [0xdf,0xea]
fucompi %st(2),%st
// CHECK: fucomip %st(2)
// CHECK: fucompi %st(2)
// CHECK: encoding: [0xdf,0xea]
fucompi %st(2)
// CHECK: fucomip %st(1)
// CHECK: fucompi %st(1)
// CHECK: encoding: [0xdf,0xe9]
fucompi