6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-19 03:29:22 +00:00
Code Issues Projects Releases Wiki Activity

Add globaladdress and targetglobaladdress nodes for dag patterns

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24389 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-11-17 07:20:15 +00:00
parent bae5b3c1c6
commit db40dc2d63
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/TargetSelectionDAG.td
View File

@ -140,6 +140,10 @@ def imm : SDNode<"ISD::Constant" , SDTImm , [], "ConstantSDNode">;
def vt : SDNode<"ISD::VALUETYPE" , SDTVT , [], "VTSDNode">;
def cond : SDNode<"ISD::CONDCODE" , SDTVT , [], "CondCodeSDNode">;
def undef : SDNode<"ISD::UNDEF" , SDTUNDEF , []>;
def globaladdr : SDNode<"ISD::GlobalAddress", SDTImm, [],
"GlobalAddressSDNode">;
def tglobaladdr : SDNode<"ISD::TargetGlobalAddress", SDTImm, [],
"GlobalAddressSDNode">;
def add : SDNode<"ISD::ADD" , SDTIntBinOp ,
[SDNPCommutative, SDNPAssociative]>;
def sub : SDNode<"ISD::SUB" , SDTIntBinOp>;