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Split scheduling from instruction selection.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52923 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2008-06-30 20:45:06 +00:00
parent 30389141c9
commit db8d56b825
11 changed files with 62 additions and 70 deletions
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11
lib/Target/Alpha/AlphaISelDAGToDAG.cpp
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@@ -161,9 +161,9 @@ namespace {
// target-specific node if it hasn't already been changed.
SDNode *Select(SDOperand Op);
/// InstructionSelectBasicBlock - This callback is invoked by
/// InstructionSelect - This callback is invoked by
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
virtual void InstructionSelect(SelectionDAG &DAG);
virtual const char *getPassName() const {
return "Alpha DAG->DAG Pattern Instruction Selection";
@@ -230,17 +230,14 @@ SDOperand AlphaDAGToDAGISel::getGlobalRetAddr() {
RA, MVT::i64);
}
/// InstructionSelectBasicBlock - This callback is invoked by
/// InstructionSelect - This callback is invoked by
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
void AlphaDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
void AlphaDAGToDAGISel::InstructionSelect(SelectionDAG &DAG) {
DEBUG(BB->dump());
// Select target instructions for the DAG.
DAG.setRoot(SelectRoot(DAG.getRoot()));
DAG.RemoveDeadNodes();
// Emit machine code to BB.
ScheduleAndEmitDAG(DAG);
}
// Select - Convert the specified operand from a target-independent to a