6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2026-04-21 23:17:16 +00:00
Code Issues Projects Releases Wiki Activity

[x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199803 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
David Woodhouse
2014-01-22 15:08:08 +00:00
parent b9b629cbaa
commit db9fa461d7
17 changed files with 280 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files
utils/TableGen/X86RecognizableInstr.cpp
+12
View File
@@ -60,6 +60,7 @@ namespace X86Local {
MRMSrcReg = 5,
MRMSrcMem = 6,
RawFrmMemOffs = 7,
RawFrmSrc = 8,
MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19,
MRM4r = 20, MRM5r = 21, MRM6r = 22, MRM7r = 23,
MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27,
@@ -630,6 +631,9 @@ void RecognizableInstr::emitInstructionSpecifier() {
switch (Form) {
default: llvm_unreachable("Unhandled form");
case X86Local::RawFrmSrc:
HANDLE_OPERAND(relocation);
return;
case X86Local::RawFrm:
// Operand 1 (optional) is an address or immediate.
// Operand 2 (optional) is an immediate.
@@ -1262,6 +1266,10 @@ OperandType RecognizableInstr::typeFromString(const std::string &s,
TYPE("SEGMENT_REG", TYPE_SEGMENTREG)
TYPE("DEBUG_REG", TYPE_DEBUGREG)
TYPE("CONTROL_REG", TYPE_CONTROLREG)
TYPE("srcidx8", TYPE_SRCIDX8)
TYPE("srcidx16", TYPE_SRCIDX16)
TYPE("srcidx32", TYPE_SRCIDX32)
TYPE("srcidx64", TYPE_SRCIDX64)
TYPE("offset8", TYPE_MOFFS8)
TYPE("offset16", TYPE_MOFFS16)
TYPE("offset32", TYPE_MOFFS32)
@@ -1474,6 +1482,10 @@ OperandEncoding RecognizableInstr::relocationEncodingFromString
ENCODING("offset16", ENCODING_Ia)
ENCODING("offset32", ENCODING_Ia)
ENCODING("offset64", ENCODING_Ia)
ENCODING("srcidx8", ENCODING_SI)
ENCODING("srcidx16", ENCODING_SI)
ENCODING("srcidx32", ENCODING_SI)
ENCODING("srcidx64", ENCODING_SI)
errs() << "Unhandled relocation encoding " << s << "\n";
llvm_unreachable("Unhandled relocation encoding");
}