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Fix PR8365 by adding a more specialized Pat that checks if an 'and' with

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8 bit constants can be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116403 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2010-10-13 13:31:20 +00:00
parent b227930cd6
commit dba81cf40e
3 changed files with 33 additions and 3 deletions
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21
lib/Target/X86/X86InstrCompiler.td
View File

@ -20,6 +20,11 @@ def GetLo32XForm : SDNodeXForm<imm, [{
return getI32Imm((unsigned)N->getZExtValue());
}]>;
def GetLo8XForm : SDNodeXForm<imm, [{
// Transformation function: get the low 8 bits.
return getI8Imm((uint8_t)N->getZExtValue());
}]>;
//===----------------------------------------------------------------------===//
// Random Pseudo Instructions.
@ -1106,9 +1111,19 @@ def : Pat<(add GR64:$src1, 0x0000000080000000),
def : Pat<(store (add (loadi64 addr:$dst), 0x00000000800000000), addr:$dst),
(SUB64mi32 addr:$dst, 0xffffffff80000000)>;
// Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it
// has an immediate with at least 32 bits of leading zeros, to avoid needing to
// materialize that immediate in a register first.
// To avoid needing to materialize an immediate in a register, use a 32-bit and
// with implicit zero-extension instead of a 64-bit and if the immediate has at
// least 32 bits of leading zeros. If in addition the last 32 bits can be
// represented with a sign extension of a 8 bit constant, use that.
def : Pat<(and GR64:$src, i64immZExt32SExt8:$imm),
(SUBREG_TO_REG
(i64 0),
(AND32ri8
(EXTRACT_SUBREG GR64:$src, sub_32bit),
(i32 (GetLo8XForm imm:$imm))),
sub_32bit)>;
def : Pat<(and GR64:$src, i64immZExt32:$imm),
(SUBREG_TO_REG
(i64 0),

5
lib/Target/X86/X86InstrInfo.td
View File

@ -473,6 +473,11 @@ def i64immZExt32 : PatLeaf<(i64 imm), [{
return (uint64_t)N->getZExtValue() == (uint32_t)N->getZExtValue();
}]>;
def i64immZExt32SExt8 : PatLeaf<(i64 imm), [{
uint64_t v = N->getZExtValue();
return v == (uint32_t)v && (int32_t)v == (int8_t)v;
}]>;
// Helper fragments for loads.
// It's always safe to treat a anyext i16 load as a i32 load if the i16 is
// known to be 32-bit aligned or better. Ditto for i8 to i16.

10
test/CodeGen/X86/andimm8.ll Normal file
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@ -0,0 +1,10 @@
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s
; PR8365
; CHECK: andl $-64, %edi # encoding: [0x83,0xe7,0xc0]
define i64 @bra(i32 %zed) nounwind {
%t1 = zext i32 %zed to i64
%t2 = and i64 %t1, 4294967232
ret i64 %t2
}