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Add notes about future PowerPC features
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174232 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -66,6 +66,23 @@ def FeatureBookE : SubtargetFeature<"booke", "IsBookE", "true",
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def FeatureQPX : SubtargetFeature<"qpx","HasQPX", "true",
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"Enable QPX instructions">;
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// Note: Future features to add when support is extended to more
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// recent ISA levels:
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//
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// CMPB p6, p6x, p7 cmpb
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// DFP p6, p6x, p7 decimal floating-point instructions
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// FLT_CVT p7 fcfids, fcfidu, fcfidus, fcfiduz, fctiwuz
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// FPRND p5x, p6, p6x, p7 frim, frin, frip, friz
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// FRE p5 through p7 fre (vs. fres, available since p3)
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// FRSQRTES p5 through p7 frsqrtes (vs. frsqrte, available since p3)
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// LDBRX p7 load with byte reversal
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// LFIWAX p6, p6x, p7 lfiwax
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// LFIWZX p7 lfiwzx
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// POPCNTB p5 through p7 popcntb and related instructions
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// POPCNTD p7 popcntd and related instructions
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// RECIP_PREC p6, p6x, p7 higher precision reciprocal estimates
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// VSX p7 vector-scalar instruction set
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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