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SelectionDAG: fix logic for promoting shift types

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r238503 fixed the problem of too-small shift types by promoting them
during legalization, but the correct solution is to promote only the
operands that actually demand promotion.

This fixes a crash on an out-of-tree target caused by trying to
promote an operand that can't be promoted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238632 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Fiona Glaser 2015-05-29 23:37:22 +00:00
parent bfa311df8c
commit dbf84c95fe
1 changed files with 21 additions and 15 deletions
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36
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@ -602,11 +602,13 @@ SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) {
}
SDValue DAGTypeLegalizer::PromoteIntRes_SHL(SDNode *N) {
SDValue Res = GetPromotedInteger(N->getOperand(0));
SDValue Amt = N->getOperand(1);
if (!TLI.isTypeLegal(Amt.getValueType()))
Amt = ZExtPromotedInteger(N->getOperand(1));
return DAG.getNode(ISD::SHL, SDLoc(N), Res.getValueType(), Res, Amt);
SDValue LHS = N->getOperand(0);
SDValue RHS = N->getOperand(1);
if (getTypeAction(LHS.getValueType()) == TargetLowering::TypePromoteInteger)
LHS = GetPromotedInteger(LHS);
if (getTypeAction(RHS.getValueType()) == TargetLowering::TypePromoteInteger)
RHS = ZExtPromotedInteger(RHS);
return DAG.getNode(ISD::SHL, SDLoc(N), LHS.getValueType(), LHS, RHS);
}
SDValue DAGTypeLegalizer::PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N) {
@ -626,21 +628,25 @@ SDValue DAGTypeLegalizer::PromoteIntRes_SimpleIntBinOp(SDNode *N) {
}
SDValue DAGTypeLegalizer::PromoteIntRes_SRA(SDNode *N) {
SDValue LHS = N->getOperand(0);
SDValue RHS = N->getOperand(1);
// The input value must be properly sign extended.
SDValue Res = SExtPromotedInteger(N->getOperand(0));
SDValue Amt = N->getOperand(1);
if (!TLI.isTypeLegal(Amt.getValueType()))
Amt = ZExtPromotedInteger(N->getOperand(1));
return DAG.getNode(ISD::SRA, SDLoc(N), Res.getValueType(), Res, Amt);
if (getTypeAction(LHS.getValueType()) == TargetLowering::TypePromoteInteger)
LHS = SExtPromotedInteger(LHS);
if (getTypeAction(RHS.getValueType()) == TargetLowering::TypePromoteInteger)
RHS = ZExtPromotedInteger(RHS);
return DAG.getNode(ISD::SRA, SDLoc(N), LHS.getValueType(), LHS, RHS);
}
SDValue DAGTypeLegalizer::PromoteIntRes_SRL(SDNode *N) {
SDValue LHS = N->getOperand(0);
SDValue RHS = N->getOperand(1);
// The input value must be properly zero extended.
SDValue Res = ZExtPromotedInteger(N->getOperand(0));
SDValue Amt = N->getOperand(1);
if (!TLI.isTypeLegal(Amt.getValueType()))
Amt = ZExtPromotedInteger(N->getOperand(1));
return DAG.getNode(ISD::SRL, SDLoc(N), Res.getValueType(), Res, Amt);
if (getTypeAction(LHS.getValueType()) == TargetLowering::TypePromoteInteger)
LHS = ZExtPromotedInteger(LHS);
if (getTypeAction(RHS.getValueType()) == TargetLowering::TypePromoteInteger)
RHS = ZExtPromotedInteger(RHS);
return DAG.getNode(ISD::SRL, SDLoc(N), LHS.getValueType(), LHS, RHS);
}
SDValue DAGTypeLegalizer::PromoteIntRes_TRUNCATE(SDNode *N) {