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SelectionDAG: fix logic for promoting shift types
r238503 fixed the problem of too-small shift types by promoting them during legalization, but the correct solution is to promote only the operands that actually demand promotion. This fixes a crash on an out-of-tree target caused by trying to promote an operand that can't be promoted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238632 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -602,11 +602,13 @@ SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) {
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}
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SDValue DAGTypeLegalizer::PromoteIntRes_SHL(SDNode *N) {
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SDValue Res = GetPromotedInteger(N->getOperand(0));
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SDValue Amt = N->getOperand(1);
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if (!TLI.isTypeLegal(Amt.getValueType()))
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Amt = ZExtPromotedInteger(N->getOperand(1));
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return DAG.getNode(ISD::SHL, SDLoc(N), Res.getValueType(), Res, Amt);
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SDValue LHS = N->getOperand(0);
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SDValue RHS = N->getOperand(1);
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if (getTypeAction(LHS.getValueType()) == TargetLowering::TypePromoteInteger)
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LHS = GetPromotedInteger(LHS);
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if (getTypeAction(RHS.getValueType()) == TargetLowering::TypePromoteInteger)
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RHS = ZExtPromotedInteger(RHS);
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return DAG.getNode(ISD::SHL, SDLoc(N), LHS.getValueType(), LHS, RHS);
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}
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SDValue DAGTypeLegalizer::PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N) {
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@ -626,21 +628,25 @@ SDValue DAGTypeLegalizer::PromoteIntRes_SimpleIntBinOp(SDNode *N) {
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}
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SDValue DAGTypeLegalizer::PromoteIntRes_SRA(SDNode *N) {
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SDValue LHS = N->getOperand(0);
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SDValue RHS = N->getOperand(1);
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// The input value must be properly sign extended.
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SDValue Res = SExtPromotedInteger(N->getOperand(0));
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SDValue Amt = N->getOperand(1);
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if (!TLI.isTypeLegal(Amt.getValueType()))
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Amt = ZExtPromotedInteger(N->getOperand(1));
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return DAG.getNode(ISD::SRA, SDLoc(N), Res.getValueType(), Res, Amt);
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if (getTypeAction(LHS.getValueType()) == TargetLowering::TypePromoteInteger)
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LHS = SExtPromotedInteger(LHS);
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if (getTypeAction(RHS.getValueType()) == TargetLowering::TypePromoteInteger)
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RHS = ZExtPromotedInteger(RHS);
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return DAG.getNode(ISD::SRA, SDLoc(N), LHS.getValueType(), LHS, RHS);
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}
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SDValue DAGTypeLegalizer::PromoteIntRes_SRL(SDNode *N) {
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SDValue LHS = N->getOperand(0);
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SDValue RHS = N->getOperand(1);
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// The input value must be properly zero extended.
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SDValue Res = ZExtPromotedInteger(N->getOperand(0));
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SDValue Amt = N->getOperand(1);
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if (!TLI.isTypeLegal(Amt.getValueType()))
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Amt = ZExtPromotedInteger(N->getOperand(1));
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return DAG.getNode(ISD::SRL, SDLoc(N), Res.getValueType(), Res, Amt);
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if (getTypeAction(LHS.getValueType()) == TargetLowering::TypePromoteInteger)
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LHS = ZExtPromotedInteger(LHS);
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if (getTypeAction(RHS.getValueType()) == TargetLowering::TypePromoteInteger)
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RHS = ZExtPromotedInteger(RHS);
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return DAG.getNode(ISD::SRL, SDLoc(N), LHS.getValueType(), LHS, RHS);
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}
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SDValue DAGTypeLegalizer::PromoteIntRes_TRUNCATE(SDNode *N) {
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