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[SystemZ] Add ARK, AGRK, SRK and SGRK
The testsuite changes follow the same lines as for r186683. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186686 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -535,8 +535,8 @@ def : Pat<(or (zext32 GR32:$src), imm64hf32:$imm),
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let Defs = [CC] in {
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let Defs = [CC] in {
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// Addition of a register.
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// Addition of a register.
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let isCommutable = 1 in {
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let isCommutable = 1 in {
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def AR : BinaryRR <"a", 0x1A, add, GR32, GR32>;
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defm AR : BinaryRRAndK<"a", 0x1A, 0xB9F8, add, GR32, GR32>;
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def AGR : BinaryRRE<"ag", 0xB908, add, GR64, GR64>;
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defm AGR : BinaryRREAndK<"ag", 0xB908, 0xB9E8, add, GR64, GR64>;
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}
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}
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def AGFR : BinaryRRE<"agf", 0xB918, null_frag, GR64, GR32>;
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def AGFR : BinaryRRE<"agf", 0xB918, null_frag, GR64, GR32>;
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@ -599,9 +599,9 @@ let Defs = [CC], Uses = [CC] in {
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// add-immediate instruction instead.
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// add-immediate instruction instead.
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let Defs = [CC] in {
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let Defs = [CC] in {
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// Subtraction of a register.
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// Subtraction of a register.
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def SR : BinaryRR <"s", 0x1B, sub, GR32, GR32>;
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defm SR : BinaryRRAndK<"s", 0x1B, 0xB9F9, sub, GR32, GR32>;
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def SGFR : BinaryRRE<"sgf", 0xB919, null_frag, GR64, GR32>;
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def SGFR : BinaryRRE<"sgf", 0xB919, null_frag, GR64, GR32>;
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def SGR : BinaryRRE<"sg", 0xB909, sub, GR64, GR64>;
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defm SGR : BinaryRREAndK<"sg", 0xB909, 0xB9E9, sub, GR64, GR64>;
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// Subtraction of memory.
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// Subtraction of memory.
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defm SH : BinaryRXPair<"sh", 0x4B, 0xE37B, sub, GR32, sextloadi16, 2>;
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defm SH : BinaryRXPair<"sh", 0x4B, 0xE37B, sub, GR32, sextloadi16, 2>;
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@ -1,6 +1,6 @@
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; Test 32-bit atomic additions.
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; Test 32-bit atomic additions.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Check addition of a variable.
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; Check addition of a variable.
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define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
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define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
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@ -1,6 +1,6 @@
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; Test 64-bit atomic additions.
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; Test 64-bit atomic additions.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Check addition of a variable.
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; Check addition of a variable.
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define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
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define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
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@ -1,6 +1,6 @@
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; Test 32-bit atomic subtractions.
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; Test 32-bit atomic subtractions.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Check subtraction of a variable.
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; Check subtraction of a variable.
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define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
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define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
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@ -1,6 +1,6 @@
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; Test 64-bit atomic subtractions.
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; Test 64-bit atomic subtractions.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Check subtraction of a variable.
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; Check subtraction of a variable.
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define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
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define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
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@ -1,6 +1,7 @@
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; Test 32-bit addition in which the second operand is variable.
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; Test 32-bit addition in which the second operand is variable.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i32 @foo()
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declare i32 @foo()
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@ -1,6 +1,7 @@
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; Test 64-bit addition in which the second operand is variable.
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; Test 64-bit addition in which the second operand is variable.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i64 @foo()
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declare i64 @foo()
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39
test/CodeGen/SystemZ/int-add-13.ll
Normal file
39
test/CodeGen/SystemZ/int-add-13.ll
Normal file
@ -0,0 +1,39 @@
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; Test the three-operand forms of addition.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Check ARK.
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define i32 @f1(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: f1:
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; CHECK: ark %r2, %r3, %r4
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; CHECK: br %r14
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%add = add i32 %b, %c
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ret i32 %add
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}
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; Check that we can still use AR in obvious cases.
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define i32 @f2(i32 %a, i32 %b) {
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; CHECK-LABEL: f2:
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; CHECK: ar %r2, %r3
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; CHECK: br %r14
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%add = add i32 %a, %b
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ret i32 %add
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}
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; Check AGRK.
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define i64 @f3(i64 %a, i64 %b, i64 %c) {
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; CHECK-LABEL: f3:
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; CHECK: agrk %r2, %r3, %r4
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; CHECK: br %r14
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%add = add i64 %b, %c
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ret i64 %add
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}
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; Check that we can still use AGR in obvious cases.
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define i64 @f4(i64 %a, i64 %b) {
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; CHECK-LABEL: f4:
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; CHECK: agr %r2, %r3
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; CHECK: br %r14
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%add = add i64 %a, %b
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ret i64 %add
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}
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@ -1,6 +1,7 @@
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; Test 32-bit subtraction.
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; Test 32-bit subtraction.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i32 @foo()
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declare i32 @foo()
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; Test 64-bit subtraction in which the second operand is variable.
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; Test 64-bit subtraction in which the second operand is variable.
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;
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i64 @foo()
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declare i64 @foo()
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39
test/CodeGen/SystemZ/int-sub-08.ll
Normal file
39
test/CodeGen/SystemZ/int-sub-08.ll
Normal file
@ -0,0 +1,39 @@
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; Test the three-operand forms of subtraction.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Check SRK.
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define i32 @f1(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: f1:
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; CHECK: srk %r2, %r3, %r4
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; CHECK: br %r14
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%sub = sub i32 %b, %c
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ret i32 %sub
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}
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; Check that we can still use SR in obvious cases.
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define i32 @f2(i32 %a, i32 %b) {
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; CHECK-LABEL: f2:
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; CHECK: sr %r2, %r3
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; CHECK: br %r14
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%sub = sub i32 %a, %b
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ret i32 %sub
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}
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; Check SGRK.
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define i64 @f3(i64 %a, i64 %b, i64 %c) {
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; CHECK-LABEL: f3:
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; CHECK: sgrk %r2, %r3, %r4
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; CHECK: br %r14
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%sub = sub i64 %b, %c
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ret i64 %sub
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}
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; Check that we can still use SGR in obvious cases.
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define i64 @f4(i64 %a, i64 %b) {
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; CHECK-LABEL: f4:
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; CHECK: sgr %r2, %r3
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; CHECK: br %r14
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%sub = sub i64 %a, %b
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ret i64 %sub
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}
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@ -175,6 +175,12 @@
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# CHECK: agr %r7, %r8
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# CHECK: agr %r7, %r8
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0xb9 0x08 0x00 0x78
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0xb9 0x08 0x00 0x78
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# CHECK: agrk %r0, %r0, %r0
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0xb9 0xe8 0x00 0x00
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# CHECK: agrk %r2, %r3, %r4
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0xb9 0xe8 0x40 0x23
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# CHECK: agsi -524288, 0
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# CHECK: agsi -524288, 0
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0xeb 0x00 0x00 0x00 0x80 0x7a
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0xeb 0x00 0x00 0x00 0x80 0x7a
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@ -574,6 +580,12 @@
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# CHECK: ar %r7, %r8
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# CHECK: ar %r7, %r8
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0x1a 0x78
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0x1a 0x78
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# CHECK: ark %r0, %r0, %r0
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0xb9 0xf8 0x00 0x00
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# CHECK: ark %r2, %r3, %r4
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0xb9 0xf8 0x40 0x23
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# CHECK: asi -524288, 0
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# CHECK: asi -524288, 0
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0xeb 0x00 0x00 0x00 0x80 0x6a
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0xeb 0x00 0x00 0x00 0x80 0x6a
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@ -4936,6 +4948,12 @@
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# CHECK: sgr %r7, %r8
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# CHECK: sgr %r7, %r8
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0xb9 0x09 0x00 0x78
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0xb9 0x09 0x00 0x78
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# CHECK: sgrk %r0, %r0, %r0
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0xb9 0xe9 0x00 0x00
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# CHECK: sgrk %r2, %r3, %r4
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0xb9 0xe9 0x40 0x23
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# CHECK: sg %r0, -524288
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# CHECK: sg %r0, -524288
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0xe3 0x00 0x00 0x00 0x80 0x09
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0xe3 0x00 0x00 0x00 0x80 0x09
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@ -5644,6 +5662,12 @@
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# CHECK: sr %r7, %r8
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# CHECK: sr %r7, %r8
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0x1b 0x78
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0x1b 0x78
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# CHECK: srk %r0, %r0, %r0
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0xb9 0xf9 0x00 0x00
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# CHECK: srk %r2, %r3, %r4
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0xb9 0xf9 0x40 0x23
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# CHECK: stc %r0, 0
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# CHECK: stc %r0, 0
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0x42 0x00 0x00 0x00
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0x42 0x00 0x00 0x00
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aghi %r0, 32768
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aghi %r0, 32768
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aghi %r0, foo
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aghi %r0, foo
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#CHECK: error: {{(instruction requires: distinct-ops)?}}
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#CHECK: agrk %r2,%r3,%r4
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agrk %r2,%r3,%r4
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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#CHECK: agsi -524289, 0
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#CHECK: agsi -524289, 0
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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@ -177,6 +182,11 @@
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aly %r0, -524289
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aly %r0, -524289
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aly %r0, 524288
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aly %r0, 524288
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#CHECK: error: {{(instruction requires: distinct-ops)?}}
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#CHECK: ark %r2,%r3,%r4
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ark %r2,%r3,%r4
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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#CHECK: asi -524289, 0
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#CHECK: asi -524289, 0
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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@ -2264,6 +2274,11 @@
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sgf %r0, -524289
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sgf %r0, -524289
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sgf %r0, 524288
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sgf %r0, 524288
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#CHECK: error: {{(instruction requires: distinct-ops)?}}
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#CHECK: sgrk %r2,%r3,%r4
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sgrk %r2,%r3,%r4
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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#CHECK: sh %r0, -1
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#CHECK: sh %r0, -1
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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@ -2434,6 +2449,11 @@
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srak %r2,%r3,4(%r5)
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srak %r2,%r3,4(%r5)
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#CHECK: error: {{(instruction requires: distinct-ops)?}}
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#CHECK: srk %r2,%r3,%r4
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srk %r2,%r3,%r4
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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#CHECK: srl %r0,-1
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#CHECK: srl %r0,-1
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#CHECK: error: invalid operand
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#CHECK: error: invalid operand
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# For z196 and above.
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# For z196 and above.
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# RUN: llvm-mc -triple s390x-linux-gnu -mcpu=z196 -show-encoding %s | FileCheck %s
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# RUN: llvm-mc -triple s390x-linux-gnu -mcpu=z196 -show-encoding %s | FileCheck %s
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#CHECK: agrk %r0, %r0, %r0 # encoding: [0xb9,0xe8,0x00,0x00]
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#CHECK: agrk %r0, %r0, %r15 # encoding: [0xb9,0xe8,0xf0,0x00]
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#CHECK: agrk %r0, %r15, %r0 # encoding: [0xb9,0xe8,0x00,0x0f]
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#CHECK: agrk %r15, %r0, %r0 # encoding: [0xb9,0xe8,0x00,0xf0]
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#CHECK: agrk %r7, %r8, %r9 # encoding: [0xb9,0xe8,0x90,0x78]
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agrk %r0,%r0,%r0
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agrk %r0,%r0,%r15
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agrk %r0,%r15,%r0
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agrk %r15,%r0,%r0
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agrk %r7,%r8,%r9
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#CHECK: ark %r0, %r0, %r0 # encoding: [0xb9,0xf8,0x00,0x00]
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#CHECK: ark %r0, %r0, %r15 # encoding: [0xb9,0xf8,0xf0,0x00]
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#CHECK: ark %r0, %r15, %r0 # encoding: [0xb9,0xf8,0x00,0x0f]
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#CHECK: ark %r15, %r0, %r0 # encoding: [0xb9,0xf8,0x00,0xf0]
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#CHECK: ark %r7, %r8, %r9 # encoding: [0xb9,0xf8,0x90,0x78]
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ark %r0,%r0,%r0
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ark %r0,%r0,%r15
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ark %r0,%r15,%r0
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ark %r15,%r0,%r0
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ark %r7,%r8,%r9
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||||||
|
|
||||||
#CHECK: ngrk %r0, %r0, %r0 # encoding: [0xb9,0xe4,0x00,0x00]
|
#CHECK: ngrk %r0, %r0, %r0 # encoding: [0xb9,0xe4,0x00,0x00]
|
||||||
#CHECK: ngrk %r0, %r0, %r15 # encoding: [0xb9,0xe4,0xf0,0x00]
|
#CHECK: ngrk %r0, %r0, %r15 # encoding: [0xb9,0xe4,0xf0,0x00]
|
||||||
#CHECK: ngrk %r0, %r15, %r0 # encoding: [0xb9,0xe4,0x00,0x0f]
|
#CHECK: ngrk %r0, %r15, %r0 # encoding: [0xb9,0xe4,0x00,0x0f]
|
||||||
@ -49,6 +73,18 @@
|
|||||||
ork %r15,%r0,%r0
|
ork %r15,%r0,%r0
|
||||||
ork %r7,%r8,%r9
|
ork %r7,%r8,%r9
|
||||||
|
|
||||||
|
#CHECK: sgrk %r0, %r0, %r0 # encoding: [0xb9,0xe9,0x00,0x00]
|
||||||
|
#CHECK: sgrk %r0, %r0, %r15 # encoding: [0xb9,0xe9,0xf0,0x00]
|
||||||
|
#CHECK: sgrk %r0, %r15, %r0 # encoding: [0xb9,0xe9,0x00,0x0f]
|
||||||
|
#CHECK: sgrk %r15, %r0, %r0 # encoding: [0xb9,0xe9,0x00,0xf0]
|
||||||
|
#CHECK: sgrk %r7, %r8, %r9 # encoding: [0xb9,0xe9,0x90,0x78]
|
||||||
|
|
||||||
|
sgrk %r0,%r0,%r0
|
||||||
|
sgrk %r0,%r0,%r15
|
||||||
|
sgrk %r0,%r15,%r0
|
||||||
|
sgrk %r15,%r0,%r0
|
||||||
|
sgrk %r7,%r8,%r9
|
||||||
|
|
||||||
#CHECK: sllk %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xdf]
|
#CHECK: sllk %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xdf]
|
||||||
#CHECK: sllk %r15, %r1, 0 # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xdf]
|
#CHECK: sllk %r15, %r1, 0 # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xdf]
|
||||||
#CHECK: sllk %r1, %r15, 0 # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xdf]
|
#CHECK: sllk %r1, %r15, 0 # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xdf]
|
||||||
@ -101,6 +137,18 @@
|
|||||||
srak %r0,%r0,524287(%r1)
|
srak %r0,%r0,524287(%r1)
|
||||||
srak %r0,%r0,524287(%r15)
|
srak %r0,%r0,524287(%r15)
|
||||||
|
|
||||||
|
#CHECK: srk %r0, %r0, %r0 # encoding: [0xb9,0xf9,0x00,0x00]
|
||||||
|
#CHECK: srk %r0, %r0, %r15 # encoding: [0xb9,0xf9,0xf0,0x00]
|
||||||
|
#CHECK: srk %r0, %r15, %r0 # encoding: [0xb9,0xf9,0x00,0x0f]
|
||||||
|
#CHECK: srk %r15, %r0, %r0 # encoding: [0xb9,0xf9,0x00,0xf0]
|
||||||
|
#CHECK: srk %r7, %r8, %r9 # encoding: [0xb9,0xf9,0x90,0x78]
|
||||||
|
|
||||||
|
srk %r0,%r0,%r0
|
||||||
|
srk %r0,%r0,%r15
|
||||||
|
srk %r0,%r15,%r0
|
||||||
|
srk %r15,%r0,%r0
|
||||||
|
srk %r7,%r8,%r9
|
||||||
|
|
||||||
#CHECK: srlk %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xde]
|
#CHECK: srlk %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xde]
|
||||||
#CHECK: srlk %r15, %r1, 0 # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xde]
|
#CHECK: srlk %r15, %r1, 0 # encoding: [0xeb,0xf1,0x00,0x00,0x00,0xde]
|
||||||
#CHECK: srlk %r1, %r15, 0 # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xde]
|
#CHECK: srlk %r1, %r15, 0 # encoding: [0xeb,0x1f,0x00,0x00,0x00,0xde]
|
||||||
|
Loading…
Reference in New Issue
Block a user