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PTX: Cleanup unused code in PTXMachineFunctionInfo

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140390 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Justin Holewinski 2011-09-23 17:15:53 +00:00
parent d7070fe6df
commit dc0baf9b40
3 changed files with 60 additions and 158 deletions
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6
lib/Target/PTX/PTXAsmPrinter.cpp
View File

@ -600,8 +600,8 @@ void PTXAsmPrinter::EmitFunctionDeclaration() {
decl += PM.getParamName(*i);
}
} else {
for (PTXMachineFunctionInfo::ret_iterator
i = MFI->retRegBegin(), e = MFI->retRegEnd(), b = i;
for (PTXMachineFunctionInfo::reg_iterator
i = MFI->retreg_begin(), e = MFI->retreg_end(), b = i;
i != e; ++i) {
if (i != b) {
decl += ", ";
@ -638,7 +638,7 @@ void PTXAsmPrinter::EmitFunctionDeclaration() {
}
} else {
for (PTXMachineFunctionInfo::reg_iterator
i = MFI->argRegBegin(), e = MFI->argRegEnd(), b = i;
i = MFI->argreg_begin(), e = MFI->argreg_end(), b = i;
i != e; ++i) {
if (i != b) {
decl += ", ";

61
lib/Target/PTX/PTXISelLowering.cpp
View File

@ -228,32 +228,14 @@ SDValue PTXTargetLowering::
SDValue ArgValue = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain,
DAG.getTargetConstant(Param, MVT::i32));
InVals.push_back(ArgValue);
// Instead of storing a physical register in our argument list, we just
// store the total size of the parameter, in bits. The ASM printer
// knows how to process this.
MFI->addArgParam(Ins[i].VT.getStoreSizeInBits());
}
}
else {
// For device functions, we use the PTX calling convention to do register
// assignments then create CopyFromReg ISDs for the allocated registers
//SmallVector<CCValAssign, 16> ArgLocs;
//CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), ArgLocs,
// *DAG.getContext());
//CCInfo.AnalyzeFormalArguments(Ins, CC_PTX);
//for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
EVT RegVT = Ins[i].VT;
TargetRegisterClass* TRC = 0;
int OpCode;
//assert(VA.isRegLoc() && "CCValAssign must be RegLoc");
// Determine which register class we need
if (RegVT == MVT::i1) {
TRC = PTX::RegPredRegisterClass;
@ -329,12 +311,6 @@ SDValue PTXTargetLowering::
PTXParamManager &PM = MFI->getParamManager();
SDValue Flag;
// Even though we could use the .param space for return arguments for
// device functions if SM >= 2.0 and the number of return arguments is
// only 1, we just always use registers since this makes the codegen
// easier.
const PTXSubtarget& ST = getTargetMachine().getSubtarget<PTXSubtarget>();
if (ST.useParamSpaceForDeviceArgs()) {
@ -346,27 +322,9 @@ SDValue PTXTargetLowering::
SDValue ParamIndex = DAG.getTargetConstant(Param, MVT::i32);
Chain = DAG.getNode(PTXISD::STORE_PARAM, dl, MVT::Other, Chain,
ParamIndex, OutVals[0]);
//Flag = Chain.getValue(1);
//MFI->setRetParamSize(Outs[0].VT.getStoreSizeInBits());
}
} else {
//SmallVector<CCValAssign, 16> RVLocs;
//CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
//getTargetMachine(), RVLocs, *DAG.getContext());
//CCInfo.AnalyzeReturn(Outs, RetCC_PTX);
//for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) {
//CCValAssign& VA = RVLocs[i];
for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
//assert(VA.isRegLoc() && "CCValAssign must be RegLoc");
//unsigned Reg = VA.getLocReg();
EVT RegVT = Outs[i].VT;
TargetRegisterClass* TRC = 0;
@ -395,24 +353,12 @@ SDValue PTXTargetLowering::
unsigned Reg = MF.getRegInfo().createVirtualRegister(TRC);
//DAG.getMachineFunction().getRegInfo().addLiveOut(Reg);
//Chain = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i], Flag);
//SDValue Copy = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i]/*, Flag*/);
// Guarantee that all emitted copies are stuck together,
// avoiding something bad
//Flag = Chain.getValue(1);
SDValue Copy = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i]/*, Flag*/);
SDValue OutReg = DAG.getRegister(Reg, RegVT);
Chain = DAG.getNode(PTXISD::WRITE_PARAM, dl, MVT::Other, Copy, OutReg);
//Flag = Chain.getValue(1);
MFI->addRetReg(Reg);
//MFI->addRetReg(Reg);
}
}
@ -447,6 +393,7 @@ PTXTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
Ops[0] = Chain;
// Identify the callee function
if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
const GlobalValue *GV = G->getGlobal();
if (const Function *F = dyn_cast<Function>(GV)) {
@ -461,6 +408,9 @@ PTXTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
assert(false && "Function must be a GlobalAddressSDNode");
}
// Generate STORE_PARAM nodes for each function argument. In PTX, function
// arguments are explicitly stored into .param variables and passed as
// arguments. There is no register/stack-based calling convention in PTX.
for (unsigned i = 0; i != OutVals.size(); ++i) {
unsigned Size = OutVals[i].getValueType().getSizeInBits();
unsigned Param = PM.addLocalParam(Size);
@ -472,6 +422,7 @@ PTXTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
std::vector<unsigned> InParams;
// Generate list of .param variables to hold the return value(s).
for (unsigned i = 0; i < Ins.size(); ++i) {
unsigned Size = Ins[i].VT.getStoreSizeInBits();
unsigned Param = PM.addLocalParam(Size);
@ -482,8 +433,10 @@ PTXTargetLowering::LowerCall(SDValue Chain, SDValue Callee,
Ops[0] = Chain;
// Create the CALL node.
Chain = DAG.getNode(PTXISD::CALL, dl, MVT::Other, &Ops[0], Ops.size());
// Create the LOAD_PARAM nodes that retrieve the function return value(s).
for (unsigned i = 0; i < Ins.size(); ++i) {
SDValue Index = DAG.getTargetConstant(InParams[i], MVT::i32);
SDValue Load = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain, Index);

151
lib/Target/PTX/PTXMachineFunctionInfo.h
View File

@ -31,134 +31,79 @@ namespace llvm {
///
class PTXMachineFunctionInfo : public MachineFunctionInfo {
private:
bool is_kernel;
DenseSet<unsigned> reg_local_var;
DenseSet<unsigned> reg_arg;
DenseSet<unsigned> reg_ret;
std::vector<unsigned> call_params;
bool _isDoneAddArg;
bool IsKernel;
DenseSet<unsigned> RegArgs;
DenseSet<unsigned> RegRets;
typedef std::vector<unsigned> RegisterList;
typedef DenseMap<const TargetRegisterClass*, RegisterList> RegisterMap;
typedef DenseMap<unsigned, std::string> RegisterNameMap;
RegisterMap usedRegs;
RegisterNameMap regNames;
SmallVector<unsigned, 8> argParams;
unsigned retParamSize;
RegisterMap UsedRegs;
RegisterNameMap RegNames;
PTXParamManager ParamManager;
public:
PTXMachineFunctionInfo(MachineFunction &MF)
: is_kernel(false), reg_ret(PTX::NoRegister), _isDoneAddArg(false) {
usedRegs[PTX::RegPredRegisterClass] = RegisterList();
usedRegs[PTX::RegI16RegisterClass] = RegisterList();
usedRegs[PTX::RegI32RegisterClass] = RegisterList();
usedRegs[PTX::RegI64RegisterClass] = RegisterList();
usedRegs[PTX::RegF32RegisterClass] = RegisterList();
usedRegs[PTX::RegF64RegisterClass] = RegisterList();
typedef DenseSet<unsigned>::const_iterator reg_iterator;
retParamSize = 0;
PTXMachineFunctionInfo(MachineFunction &MF)
: IsKernel(false) {
UsedRegs[PTX::RegPredRegisterClass] = RegisterList();
UsedRegs[PTX::RegI16RegisterClass] = RegisterList();
UsedRegs[PTX::RegI32RegisterClass] = RegisterList();
UsedRegs[PTX::RegI64RegisterClass] = RegisterList();
UsedRegs[PTX::RegF32RegisterClass] = RegisterList();
UsedRegs[PTX::RegF64RegisterClass] = RegisterList();
}
/// getParamManager - Returns the PTXParamManager instance for this function.
PTXParamManager& getParamManager() { return ParamManager; }
const PTXParamManager& getParamManager() const { return ParamManager; }
void setKernel(bool _is_kernel=true) { is_kernel = _is_kernel; }
/// setKernel/isKernel - Gets/sets a flag that indicates if this function is
/// a PTX kernel function.
void setKernel(bool _IsKernel=true) { IsKernel = _IsKernel; }
bool isKernel() const { return IsKernel; }
/// argreg_begin/argreg_end - Returns iterators to the set of registers
/// containing function arguments.
reg_iterator argreg_begin() const { return RegArgs.begin(); }
reg_iterator argreg_end() const { return RegArgs.end(); }
void addLocalVarReg(unsigned reg) { reg_local_var.insert(reg); }
void doneAddArg(void) {
_isDoneAddArg = true;
}
void doneAddLocalVar(void) {}
bool isKernel() const { return is_kernel; }
typedef DenseSet<unsigned>::const_iterator reg_iterator;
//typedef DenseSet<unsigned>::const_reverse_iterator reg_reverse_iterator;
typedef DenseSet<unsigned>::const_iterator ret_iterator;
typedef std::vector<unsigned>::const_iterator param_iterator;
typedef SmallVector<unsigned, 8>::const_iterator argparam_iterator;
bool argRegEmpty() const { return reg_arg.empty(); }
int getNumArg() const { return reg_arg.size(); }
reg_iterator argRegBegin() const { return reg_arg.begin(); }
reg_iterator argRegEnd() const { return reg_arg.end(); }
argparam_iterator argParamBegin() const { return argParams.begin(); }
argparam_iterator argParamEnd() const { return argParams.end(); }
//reg_reverse_iterator argRegReverseBegin() const { return reg_arg.rbegin(); }
//reg_reverse_iterator argRegReverseEnd() const { return reg_arg.rend(); }
bool localVarRegEmpty() const { return reg_local_var.empty(); }
reg_iterator localVarRegBegin() const { return reg_local_var.begin(); }
reg_iterator localVarRegEnd() const { return reg_local_var.end(); }
bool retRegEmpty() const { return reg_ret.empty(); }
int getNumRet() const { return reg_ret.size(); }
ret_iterator retRegBegin() const { return reg_ret.begin(); }
ret_iterator retRegEnd() const { return reg_ret.end(); }
param_iterator paramBegin() const { return call_params.begin(); }
param_iterator paramEnd() const { return call_params.end(); }
unsigned getNextParam(unsigned size) {
call_params.push_back(size);
return call_params.size()-1;
}
bool isArgReg(unsigned reg) const {
return std::find(reg_arg.begin(), reg_arg.end(), reg) != reg_arg.end();
}
/*bool isRetReg(unsigned reg) const {
return std::find(reg_ret.begin(), reg_ret.end(), reg) != reg_ret.end();
}*/
bool isLocalVarReg(unsigned reg) const {
return std::find(reg_local_var.begin(), reg_local_var.end(), reg)
!= reg_local_var.end();
}
/// retreg_begin/retreg_end - Returns iterators to the set of registers
/// containing the function return values.
reg_iterator retreg_begin() const { return RegRets.begin(); }
reg_iterator retreg_end() const { return RegRets.end(); }
/// addRetReg - Adds a register to the set of return-value registers.
void addRetReg(unsigned Reg) {
if (!reg_ret.count(Reg)) {
reg_ret.insert(Reg);
if (!RegRets.count(Reg)) {
RegRets.insert(Reg);
std::string name;
name = "%ret";
name += utostr(reg_ret.size() - 1);
regNames[Reg] = name;
name += utostr(RegRets.size() - 1);
RegNames[Reg] = name;
}
}
void setRetParamSize(unsigned SizeInBits) {
retParamSize = SizeInBits;
}
unsigned getRetParamSize() const {
return retParamSize;
}
/// addArgReg - Adds a register to the set of function argument registers.
void addArgReg(unsigned Reg) {
reg_arg.insert(Reg);
RegArgs.insert(Reg);
std::string name;
name = "%param";
name += utostr(reg_arg.size() - 1);
regNames[Reg] = name;
}
void addArgParam(unsigned SizeInBits) {
argParams.push_back(SizeInBits);
name += utostr(RegArgs.size() - 1);
RegNames[Reg] = name;
}
/// addVirtualRegister - Adds a virtual register to the set of all used
/// registers in the function.
void addVirtualRegister(const TargetRegisterClass *TRC, unsigned Reg) {
std::string name;
if (!reg_ret.count(Reg) && !reg_arg.count(Reg)) {
usedRegs[TRC].push_back(Reg);
// Do not count registers that are argument/return registers.
if (!RegRets.count(Reg) && !RegArgs.count(Reg)) {
UsedRegs[TRC].push_back(Reg);
if (TRC == PTX::RegPredRegisterClass)
name = "%p";
else if (TRC == PTX::RegI16RegisterClass)
@ -174,22 +119,26 @@ public:
else
llvm_unreachable("Invalid register class");
name += utostr(usedRegs[TRC].size() - 1);
regNames[Reg] = name;
name += utostr(UsedRegs[TRC].size() - 1);
RegNames[Reg] = name;
}
}
/// getRegisterName - Returns the name of the specified virtual register. This
/// name is used during PTX emission.
std::string getRegisterName(unsigned Reg) const {
if (regNames.count(Reg))
return regNames.lookup(Reg);
if (RegNames.count(Reg))
return RegNames.lookup(Reg);
else if (Reg == PTX::NoRegister)
return "%noreg";
else
llvm_unreachable("Register not in register name map");
}
/// getNumRegistersForClass - Returns the number of virtual registers that are
/// used for the specified register class.
unsigned getNumRegistersForClass(const TargetRegisterClass *TRC) const {
return usedRegs.lookup(TRC).size();
return UsedRegs.lookup(TRC).size();
}
}; // class PTXMachineFunctionInfo