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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 04:30:23 +00:00
Re-apply 56835 along with header file changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56848 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -308,6 +308,7 @@ namespace llvm {
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/// (if any is created) by reference. This is temporary.
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std::vector<LiveInterval*>
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addIntervalsForSpills(const LiveInterval& i,
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SmallVectorImpl<LiveInterval*> &SpillIs,
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const MachineLoopInfo *loopInfo, VirtRegMap& vrm,
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float &SSWeight);
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@ -326,7 +327,9 @@ namespace llvm {
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/// isReMaterializable - Returns true if every definition of MI of every
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/// val# of the specified interval is re-materializable. Also returns true
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/// by reference if all of the defs are load instructions.
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bool isReMaterializable(const LiveInterval &li, bool &isLoad);
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bool isReMaterializable(const LiveInterval &li,
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SmallVectorImpl<LiveInterval*> &SpillIs,
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bool &isLoad);
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/// getRepresentativeReg - Find the largest super register of the specified
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/// physical register.
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@ -387,7 +390,9 @@ namespace llvm {
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/// val# of the specified interval is re-materializable. Also returns true
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/// by reference if the def is a load.
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bool isReMaterializable(const LiveInterval &li, const VNInfo *ValNo,
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MachineInstr *MI, bool &isLoad);
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MachineInstr *MI,
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SmallVectorImpl<LiveInterval*> &SpillIs,
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bool &isLoad);
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/// tryFoldMemoryOperand - Attempts to fold either a spill / restore from
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/// slot / to reg or any rematerialized load into ith operand of specified
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@ -819,6 +819,7 @@ bool LiveIntervals::isValNoAvailableAt(const LiveInterval &li, MachineInstr *MI,
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/// val# of the specified interval is re-materializable.
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bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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const VNInfo *ValNo, MachineInstr *MI,
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SmallVectorImpl<LiveInterval*> &SpillIs,
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bool &isLoad) {
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if (DisableReMat)
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return false;
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@ -855,8 +856,8 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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// If the instruction accesses memory and the memory could be non-constant,
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// assume the instruction is not rematerializable.
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for (std::list<MachineMemOperand>::const_iterator I = MI->memoperands_begin(),
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E = MI->memoperands_end(); I != E; ++I) {
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for (std::list<MachineMemOperand>::const_iterator
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I = MI->memoperands_begin(), E = MI->memoperands_end(); I != E; ++I){
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const MachineMemOperand &MMO = *I;
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if (MMO.isVolatile() || MMO.isStore())
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return false;
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@ -924,13 +925,21 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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if (!isValNoAvailableAt(ImpLi, MI, UseIdx))
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return false;
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}
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// If a register operand of the re-materialized instruction is going to
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// be spilled next, then it's not legal to re-materialize this instruction.
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for (unsigned i = 0, e = SpillIs.size(); i != e; ++i)
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if (ImpUse == SpillIs[i]->reg)
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return false;
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}
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return true;
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}
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/// isReMaterializable - Returns true if every definition of MI of every
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/// val# of the specified interval is re-materializable.
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bool LiveIntervals::isReMaterializable(const LiveInterval &li, bool &isLoad) {
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bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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SmallVectorImpl<LiveInterval*> &SpillIs,
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bool &isLoad) {
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isLoad = false;
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for (LiveInterval::const_vni_iterator i = li.vni_begin(), e = li.vni_end();
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i != e; ++i) {
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@ -944,7 +953,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li, bool &isLoad) {
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MachineInstr *ReMatDefMI = getInstructionFromIndex(DefIdx);
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bool DefIsLoad = false;
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if (!ReMatDefMI ||
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!isReMaterializable(li, VNI, ReMatDefMI, DefIsLoad))
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!isReMaterializable(li, VNI, ReMatDefMI, SpillIs, DefIsLoad))
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return false;
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isLoad |= DefIsLoad;
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}
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@ -1728,6 +1737,7 @@ addIntervalsForSpillsFast(const LiveInterval &li,
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std::vector<LiveInterval*> LiveIntervals::
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addIntervalsForSpills(const LiveInterval &li,
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SmallVectorImpl<LiveInterval*> &SpillIs,
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const MachineLoopInfo *loopInfo, VirtRegMap &vrm,
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float &SSWeight) {
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@ -1831,7 +1841,7 @@ addIntervalsForSpills(const LiveInterval &li,
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MachineInstr *ReMatDefMI = (DefIdx == ~0u)
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? 0 : getInstructionFromIndex(DefIdx);
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bool dummy;
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if (ReMatDefMI && isReMaterializable(li, VNI, ReMatDefMI, dummy)) {
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if (ReMatDefMI && isReMaterializable(li, VNI, ReMatDefMI, SpillIs, dummy)) {
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// Remember how to remat the def of this val#.
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ReMatOrigDefs[VN] = ReMatDefMI;
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// Original def may be modified so we have to make a copy here.
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@ -879,8 +879,9 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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if (cur->weight != HUGE_VALF && cur->weight <= minWeight) {
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DOUT << "\t\t\tspilling(c): " << *cur << '\n';
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float SSWeight;
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SmallVector<LiveInterval*, 8> spillIs;
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std::vector<LiveInterval*> added =
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li_->addIntervalsForSpills(*cur, loopInfo, *vrm_, SSWeight);
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li_->addIntervalsForSpills(*cur, spillIs, loopInfo, *vrm_, SSWeight);
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addStackInterval(cur, ls_, li_, SSWeight, *vrm_);
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if (added.empty())
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return; // Early exit if all spills were folded.
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@ -931,7 +932,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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earliestStart = std::min(earliestStart, sli->beginNumber());
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float SSWeight;
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std::vector<LiveInterval*> newIs =
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li_->addIntervalsForSpills(*sli, loopInfo, *vrm_, SSWeight);
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li_->addIntervalsForSpills(*sli, spillIs, loopInfo, *vrm_, SSWeight);
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addStackInterval(sli, ls_, li_, SSWeight, *vrm_);
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std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
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spilled.insert(sli->reg);
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@ -2361,7 +2361,8 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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LI.weight = HUGE_VALF;
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else {
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bool isLoad = false;
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if (li_->isReMaterializable(LI, isLoad)) {
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SmallVector<LiveInterval*, 4> SpillIs;
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if (li_->isReMaterializable(LI, SpillIs, isLoad)) {
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// If all of the definitions of the interval are re-materializable,
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// it is a preferred candidate for spilling. If non of the defs are
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// loads, then it's potentially very cheap to re-materialize.
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@ -0,0 +1,85 @@
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; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim
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%struct..0objc_selector = type opaque
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%struct.NSString = type opaque
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%struct.XCStringList = type { i32, %struct._XCStringListNode* }
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%struct._XCStringListNode = type { [3 x i8], [0 x i8], i8 }
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%struct.__builtin_CFString = type { i32*, i32, i8*, i32 }
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internal constant %struct.__builtin_CFString { i32* getelementptr ([0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 1992, i8* getelementptr ([3 x i8]* @"\01LC", i32 0, i32 0), i32 2 } ; <%struct.__builtin_CFString*>:0 [#uses=1]
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@__CFConstantStringClassReference = external global [0 x i32] ; <[0 x i32]*> [#uses=1]
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@"\01LC" = internal constant [3 x i8] c"NO\00" ; <[3 x i8]*> [#uses=1]
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@"\01LC1" = internal constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
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@llvm.used1 = appending global [1 x i8*] [ i8* bitcast (%struct.NSString* (%struct.XCStringList*, %struct..0objc_selector*)* @"-[XCStringList stringRepresentation]" to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define %struct.NSString* @"-[XCStringList stringRepresentation]"(%struct.XCStringList* %self, %struct..0objc_selector* %_cmd) nounwind {
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entry:
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%0 = load i32* null, align 4 ; <i32> [#uses=1]
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%1 = and i32 %0, 16777215 ; <i32> [#uses=1]
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%2 = icmp eq i32 %1, 0 ; <i1> [#uses=1]
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br i1 %2, label %bb44, label %bb4
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bb4: ; preds = %entry
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%3 = load %struct._XCStringListNode** null, align 4 ; <%struct._XCStringListNode*> [#uses=2]
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%4 = icmp eq %struct._XCStringListNode* %3, null ; <i1> [#uses=1]
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%5 = bitcast %struct._XCStringListNode* %3 to i32* ; <i32*> [#uses=1]
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br label %bb37.outer
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bb6: ; preds = %bb37
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br label %bb19
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bb19: ; preds = %bb37, %bb6
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%.rle = phi i32 [ 0, %bb6 ], [ %10, %bb37 ] ; <i32> [#uses=1]
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%bufptr.0.lcssa = phi i8* [ null, %bb6 ], [ null, %bb37 ] ; <i8*> [#uses=2]
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%6 = and i32 %.rle, 16777215 ; <i32> [#uses=1]
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%7 = icmp eq i32 %6, 0 ; <i1> [#uses=1]
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br i1 %7, label %bb25.split, label %bb37
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bb25.split: ; preds = %bb19
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call void @foo(i8* getelementptr ([1 x i8]* @"\01LC1", i32 0, i32 0)) nounwind nounwind
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br label %bb35.outer
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bb34: ; preds = %bb35, %bb35, %bb35, %bb35
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%8 = getelementptr i8* %bufptr.0.lcssa, i32 %totalLength.0.ph ; <i8*> [#uses=1]
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store i8 92, i8* %8, align 1
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br label %bb35.outer
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bb35.outer: ; preds = %bb34, %bb25.split
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%totalLength.0.ph = add i32 0, %totalLength.1.ph ; <i32> [#uses=2]
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br label %bb35
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bb35: ; preds = %bb35, %bb35.outer
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%9 = load i8* null, align 1 ; <i8> [#uses=1]
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switch i8 %9, label %bb35 [
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i8 0, label %bb37.outer
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i8 32, label %bb34
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i8 92, label %bb34
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i8 34, label %bb34
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i8 39, label %bb34
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]
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bb37.outer: ; preds = %bb35, %bb4
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%totalLength.1.ph = phi i32 [ 0, %bb4 ], [ %totalLength.0.ph, %bb35 ] ; <i32> [#uses=1]
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%bufptr.1.ph = phi i8* [ null, %bb4 ], [ %bufptr.0.lcssa, %bb35 ] ; <i8*> [#uses=2]
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br i1 %4, label %bb39.split, label %bb37
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bb37: ; preds = %bb37.outer, %bb19
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%10 = load i32* %5, align 4 ; <i32> [#uses=1]
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br i1 false, label %bb6, label %bb19
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bb39.split: ; preds = %bb37.outer
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%11 = bitcast i8* null to %struct.NSString* ; <%struct.NSString*> [#uses=2]
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%12 = icmp eq i8* null, %bufptr.1.ph ; <i1> [#uses=1]
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br i1 %12, label %bb44, label %bb42
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bb42: ; preds = %bb39.split
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call void @quux(i8* %bufptr.1.ph) nounwind nounwind
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ret %struct.NSString* %11
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bb44: ; preds = %bb39.split, %entry
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%.0 = phi %struct.NSString* [ bitcast (%struct.__builtin_CFString* @0 to %struct.NSString*), %entry ], [ %11, %bb39.split ] ; <%struct.NSString*> [#uses=1]
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ret %struct.NSString* %.0
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}
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declare void @foo(i8*)
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declare void @quux(i8*)
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