6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-19 06:31:18 +00:00
Code Issues Projects Releases Wiki Activity

[Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196751 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju 2013-12-09 04:02:15 +00:00
parent a339740cb8
commit dc50e9af4b
3 changed files with 23 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/Sparc/SparcISelLowering.cpp
View File

@ -1607,6 +1607,12 @@ const char *SparcTargetLowering::getTargetNodeName(unsigned Opcode) const {
} }
} }
EVT SparcTargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const {
if (!VT.isVector())
return MVT::i32;
return VT.changeVectorElementTypeToInteger();
}
/// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to
/// be zero. Op is expected to be a target specific node. Used by DAG /// be zero. Op is expected to be a target specific node. Used by DAG
/// combiner. /// combiner.

3
lib/Target/Sparc/SparcISelLowering.h
View File

@ -79,6 +79,9 @@ namespace llvm {
virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
virtual MVT getScalarShiftAmountTy(EVT LHSTy) const { return MVT::i32; } virtual MVT getScalarShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
/// getSetCCResultType - Return the ISD::SETCC ValueType
virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const;
virtual SDValue virtual SDValue
LowerFormalArguments(SDValue Chain, LowerFormalArguments(SDValue Chain,
CallingConv::ID CallConv, CallingConv::ID CallConv,

14
test/CodeGen/SPARC/64cond.ll
View File

@ -109,3 +109,17 @@ entry:
%rv = select i1 %tobool, i64 123, i64 0 %rv = select i1 %tobool, i64 123, i64 0
ret i64 %rv ret i64 %rv
} }
; CHECK-LABEL: setcc_resultty
; CHECK: cmp
; CHECK: movne %xcc, 1, [[R:%[gilo][0-7]]]
; CHECK: or [[R]], %i1, %i0
define i1 @setcc_resultty(i64 %a, i1 %b) {
%a0 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 32)
%a1 = extractvalue { i64, i1 } %a0, 1
%a4 = or i1 %a1, %b
ret i1 %a4
}
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64)