6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2026-04-21 23:17:16 +00:00
Code Issues Projects Releases Wiki Activity

Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee

Browse Source 
that the high halfword is zero.  The shift need not be exactly 16 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111196 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
2010-08-16 22:26:55 +00:00
parent b05b80160a
commit dc66edaced
4 changed files with 27 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
test/CodeGen/ARM/pack.ll
+10 -1
View File
@@ -38,7 +38,7 @@ define i32 @test3(i32 %X, i32 %Y) {
}
; CHECK: test4
; CHECK: pkhbt r0, r0, r1
; CHECK: pkhbt r0, r0, r1, lsl #0
define i32 @test4(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, 65535 ; <i32> [#uses=1]
%tmp3 = and i32 %Y, -65536 ; <i32> [#uses=1]
@@ -86,3 +86,12 @@ define i32 @test7(i32 %X, i32 %Y) {
%tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
ret i32 %tmp57
}
; CHECK: test8
; CHECK: pkhtb r0, r0, r1, asr #22
define i32 @test8(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, -65536
%tmp3 = lshr i32 %Y, 22
%tmp57 = or i32 %tmp3, %tmp1
ret i32 %tmp57
}
test/CodeGen/Thumb2/thumb2-pack.ll
+9
View File
@@ -86,3 +86,12 @@ define i32 @test7(i32 %X, i32 %Y) {
%tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1]
ret i32 %tmp57
}
; CHECK: test8
; CHECK: pkhtb r0, r0, r1, asr #22
define i32 @test8(i32 %X, i32 %Y) {
%tmp1 = and i32 %X, -65536
%tmp3 = lshr i32 %Y, 22
%tmp57 = or i32 %tmp3, %tmp1
ret i32 %tmp57
}