Fixed reversed operands for IDIV and CMP instructions in MBlaze backend.

Use BRAD instead of BRD for indirect branches in MBlaze backend.

patch contributed by Jack Whitham!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121044 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Wesley Peck 2010-12-06 22:06:49 +00:00
parent 56a399023a
commit dc80380de8
3 changed files with 28 additions and 28 deletions

View File

@ -372,8 +372,8 @@ let Predicates=[HasBarrel] in {
}
let Predicates=[HasDiv] in {
def IDIV : Arith<0x12, 0x000, "idiv ", sdiv, IIAlu>;
def IDIVU : Arith<0x12, 0x002, "idivu ", udiv, IIAlu>;
def IDIV : ArithR<0x12, 0x000, "idiv ", sdiv, IIAlu>;
def IDIVU : ArithR<0x12, 0x002, "idivu ", udiv, IIAlu>;
}
//===----------------------------------------------------------------------===//
@ -554,7 +554,7 @@ let neverHasSideEffects = 1 in {
let usesCustomInserter = 1 in {
def Select_CC : MBlazePseudo<(outs GPR:$dst),
(ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC),
(ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC), // F T reversed
"; SELECT_CC PSEUDO!",
[]>;
@ -660,34 +660,34 @@ def : Pat<(srl GPR:$L, GPR:$R), (ShiftRL GPR:$L, GPR:$R)>;
// SET_CC operations
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETEQ),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMP GPR:$L, GPR:$R), 1)>;
(CMP GPR:$R, GPR:$L), 1)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETNE),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMP GPR:$L, GPR:$R), 2)>;
(CMP GPR:$R, GPR:$L), 2)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETGT),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMP GPR:$L, GPR:$R), 3)>;
(CMP GPR:$R, GPR:$L), 3)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLT),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMP GPR:$L, GPR:$R), 4)>;
(CMP GPR:$R, GPR:$L), 4)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETGE),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMP GPR:$L, GPR:$R), 5)>;
(CMP GPR:$R, GPR:$L), 5)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLE),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMP GPR:$L, GPR:$R), 6)>;
(CMP GPR:$R, GPR:$L), 6)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETUGT),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMPU GPR:$L, GPR:$R), 3)>;
(CMPU GPR:$R, GPR:$L), 3)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETULT),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMPU GPR:$L, GPR:$R), 4)>;
(CMPU GPR:$R, GPR:$L), 4)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETUGE),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMPU GPR:$L, GPR:$R), 5)>;
(CMPU GPR:$R, GPR:$L), 5)>;
def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETULE),
(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
(CMPU GPR:$L, GPR:$R), 6)>;
(CMPU GPR:$R, GPR:$L), 6)>;
// SELECT operations
def : Pat<(select (i32 GPR:$C), (i32 GPR:$T), (i32 GPR:$F)),
@ -696,41 +696,41 @@ def : Pat<(select (i32 GPR:$C), (i32 GPR:$T), (i32 GPR:$F)),
// SELECT_CC
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETEQ),
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 1)>;
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 1)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETNE),
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 2)>;
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 2)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETGT),
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 3)>;
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 3)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETLT),
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 4)>;
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 4)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETGE),
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 5)>;
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 5)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETLE),
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 6)>;
(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 6)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETUGT),
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 3)>;
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 3)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETULT),
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 4)>;
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 4)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETUGE),
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 5)>;
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 5)>;
def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
(i32 GPR:$T), (i32 GPR:$F), SETULE),
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 6)>;
(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 6)>;
// Ret instructions
def : Pat<(MBlazeRet GPR:$target), (RTSD GPR:$target, 0x8)>;
// BR instructions
def : Pat<(br bb:$T), (BRID bb:$T)>;
def : Pat<(brind GPR:$T), (BRD GPR:$T)>;
def : Pat<(brind GPR:$T), (BRAD GPR:$T)>;
// BRCOND instructions
def : Pat<(brcond (setcc (i32 GPR:$L), (i32 GPR:$R), SETEQ), bb:$T),

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@ -28,7 +28,7 @@ loop:
label %L3,
label %L4,
label %L5 ]
; CHECK: brd {{r[0-9]*}}
; CHECK: brad {{r[0-9]*}}
L1:
%tmp.1 = add i32 %a, %b
@ -68,5 +68,5 @@ finish:
%tmp.8 = urem i32 %tmp.7, 5
br label %loop
; CHECK: brd
; CHECK: brad {{r[0-9]*}}
}

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@ -18,8 +18,8 @@ define i32 @jmptable(i32 %arg)
i32 8, label %L8
i32 9, label %L9 ]
; CHECK: lw [[REG:r[0-9]*]]
; CHECK: brd [[REG]]
; CHECK: lw [[REG:r[0-9]*]]
; CHECK: brad [[REG]]
L0:
%var0 = add i32 %arg, 0
br label %DONE