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Fixed reversed operands for IDIV and CMP instructions in MBlaze backend.
Use BRAD instead of BRD for indirect branches in MBlaze backend. patch contributed by Jack Whitham! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121044 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -372,8 +372,8 @@ let Predicates=[HasBarrel] in {
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}
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let Predicates=[HasDiv] in {
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def IDIV : Arith<0x12, 0x000, "idiv ", sdiv, IIAlu>;
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def IDIVU : Arith<0x12, 0x002, "idivu ", udiv, IIAlu>;
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def IDIV : ArithR<0x12, 0x000, "idiv ", sdiv, IIAlu>;
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def IDIVU : ArithR<0x12, 0x002, "idivu ", udiv, IIAlu>;
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}
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//===----------------------------------------------------------------------===//
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@ -554,7 +554,7 @@ let neverHasSideEffects = 1 in {
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let usesCustomInserter = 1 in {
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def Select_CC : MBlazePseudo<(outs GPR:$dst),
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(ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC),
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(ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC), // F T reversed
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"; SELECT_CC PSEUDO!",
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[]>;
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@ -660,34 +660,34 @@ def : Pat<(srl GPR:$L, GPR:$R), (ShiftRL GPR:$L, GPR:$R)>;
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// SET_CC operations
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETEQ),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMP GPR:$L, GPR:$R), 1)>;
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(CMP GPR:$R, GPR:$L), 1)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETNE),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMP GPR:$L, GPR:$R), 2)>;
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(CMP GPR:$R, GPR:$L), 2)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETGT),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMP GPR:$L, GPR:$R), 3)>;
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(CMP GPR:$R, GPR:$L), 3)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLT),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMP GPR:$L, GPR:$R), 4)>;
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(CMP GPR:$R, GPR:$L), 4)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETGE),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMP GPR:$L, GPR:$R), 5)>;
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(CMP GPR:$R, GPR:$L), 5)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETLE),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMP GPR:$L, GPR:$R), 6)>;
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(CMP GPR:$R, GPR:$L), 6)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETUGT),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMPU GPR:$L, GPR:$R), 3)>;
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(CMPU GPR:$R, GPR:$L), 3)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETULT),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMPU GPR:$L, GPR:$R), 4)>;
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(CMPU GPR:$R, GPR:$L), 4)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETUGE),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMPU GPR:$L, GPR:$R), 5)>;
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(CMPU GPR:$R, GPR:$L), 5)>;
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def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETULE),
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(Select_CC (ADDI (i32 R0), 1), (ADDI (i32 R0), 0),
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(CMPU GPR:$L, GPR:$R), 6)>;
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(CMPU GPR:$R, GPR:$L), 6)>;
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// SELECT operations
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def : Pat<(select (i32 GPR:$C), (i32 GPR:$T), (i32 GPR:$F)),
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@ -696,41 +696,41 @@ def : Pat<(select (i32 GPR:$C), (i32 GPR:$T), (i32 GPR:$F)),
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// SELECT_CC
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETEQ),
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 1)>;
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 1)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETNE),
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 2)>;
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 2)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETGT),
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 3)>;
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 3)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETLT),
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 4)>;
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 4)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETGE),
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 5)>;
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 5)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETLE),
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$L, GPR:$R), 6)>;
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(Select_CC GPR:$T, GPR:$F, (CMP GPR:$R, GPR:$L), 6)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETUGT),
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 3)>;
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 3)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETULT),
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 4)>;
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 4)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETUGE),
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 5)>;
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 5)>;
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def : Pat<(selectcc (i32 GPR:$L), (i32 GPR:$R),
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(i32 GPR:$T), (i32 GPR:$F), SETULE),
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$L, GPR:$R), 6)>;
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(Select_CC GPR:$T, GPR:$F, (CMPU GPR:$R, GPR:$L), 6)>;
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// Ret instructions
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def : Pat<(MBlazeRet GPR:$target), (RTSD GPR:$target, 0x8)>;
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// BR instructions
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def : Pat<(br bb:$T), (BRID bb:$T)>;
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def : Pat<(brind GPR:$T), (BRD GPR:$T)>;
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def : Pat<(brind GPR:$T), (BRAD GPR:$T)>;
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// BRCOND instructions
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def : Pat<(brcond (setcc (i32 GPR:$L), (i32 GPR:$R), SETEQ), bb:$T),
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@ -28,7 +28,7 @@ loop:
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label %L3,
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label %L4,
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label %L5 ]
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; CHECK: brd {{r[0-9]*}}
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; CHECK: brad {{r[0-9]*}}
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L1:
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%tmp.1 = add i32 %a, %b
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@ -68,5 +68,5 @@ finish:
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%tmp.8 = urem i32 %tmp.7, 5
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br label %loop
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; CHECK: brd
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; CHECK: brad {{r[0-9]*}}
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}
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@ -18,8 +18,8 @@ define i32 @jmptable(i32 %arg)
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i32 8, label %L8
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i32 9, label %L9 ]
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; CHECK: lw [[REG:r[0-9]*]]
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; CHECK: brd [[REG]]
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; CHECK: lw [[REG:r[0-9]*]]
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; CHECK: brad [[REG]]
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L0:
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%var0 = add i32 %arg, 0
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br label %DONE
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