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[XCore] Ensure implicit operands aren't lost on the return instruction.

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Patch by Robert Lytton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186500 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Osborne 2013-07-17 10:58:37 +00:00
parent a009d53c4d
commit dcc4207a00
2 changed files with 19 additions and 2 deletions
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4
lib/Target/XCore/XCoreFrameLowering.cpp
View File

@ -223,7 +223,9 @@ void XCoreFrameLowering::emitEpilogue(MachineFunction &MF,
assert(MBBI->getOpcode() == XCore::RETSP_u6
|| MBBI->getOpcode() == XCore::RETSP_lu6);
int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
for (unsigned i = 3, e = MBBI->getNumOperands(); i < e; ++i)
MIB->addOperand(MBBI->getOperand(i)); // copy any variadic operands
MBB.erase(MBBI);
} else {
int Opcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;

17
test/CodeGen/XCore/epilogue_prologue.ll
View File

@ -1,6 +1,6 @@
; RUN: llc < %s -march=xcore | FileCheck %s
; CHECK: f1
; CHECK-LABEL: f1
; CHECK: stw lr, sp[0]
; CHECK: ldw lr, sp[0]
; CHECK-NEXT: retsp 0
@ -9,3 +9,18 @@ entry:
tail call void asm sideeffect "", "~{lr}"() nounwind
ret void
}
; CHECK-LABEL: f3
; CHECK: entsp 2
; CHECK: stw [[REG:r[4-9]+]], sp[1]
; CHECK: mov [[REG]], r0
; CHECK: bl f2
; CHECK: mov r0, [[REG]]
; CHECK: ldw [[REG]], sp[1]
; CHECK: retsp 2
declare void @f2()
define i32 @f3(i32 %i) nounwind {
entry:
call void @f2()
ret i32 %i
}