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PTX: Add basic documentation to CodeGenerator.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137315 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -114,6 +114,7 @@
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<li><a href="#ppc_prolog">Prolog/Epilog</a></li>
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<li><a href="#ppc_dynamic">Dynamic Allocation</a></li>
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</ul></li>
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<li><a href="#ptx">The PTX backend</a></li>
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</ul></li>
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</ol>
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@ -2912,6 +2913,70 @@ MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory
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</div>
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</div>
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<!-- ======================================================================= -->
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<h3>
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<a name="ptx">The PTX backend</a>
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</h3>
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<div>
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<p>The PTX code generator lives in the lib/Target/PTX directory. It is
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currently a work-in-progress, but already supports most of the code
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generation functionality needed to generate correct PTX kernels for
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CUDA devices.</p>
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<p>The code generator can target PTX 2.0+, and shader model 1.0+. The
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PTX ISA Reference Manual is used as the primary source of ISA
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information, though an effort is made to make the output of the code
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generator match the output of the NVidia nvcc compiler, whenever
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possible.</p>
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<p>Code Generator Options:</p>
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<table border="1" cellspacing="0">
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<tr>
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<th>Option</th>
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<th>Description</th>
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</tr>
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<tr>
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<td><code>double</code></td>
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<td align="left">If enabled, the map_f64_to_f32 directive is
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disabled in the PTX output, allowing native double-precision
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arithmetic</td>
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</tr>
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<tr>
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<td><code>no-fma</code></td>
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<td align="left">Disable generation of Fused-Multiply Add
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instructions, which may be beneficial for some devices</td>
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</tr>
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<tr>
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<td><code>smxy / computexy</code></td>
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<td align="left">Set shader model/compute capability to x.y,
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e.g. sm20 or compute13</td>
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</tr>
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</table>
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<p>Working:</p>
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<ul>
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<li>Arithmetic instruction selection (including combo FMA)</li>
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<li>Bitwise instruction selection</li>
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<li>Control-flow instruction selection</li>
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<li>Function calls (only on SM 2.0+ and no return arguments)</li>
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<li>Addresses spaces (0 = global, 1 = constant, 2 = local, 4 =
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shared)</li>
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<li>Thread synchronization (bar.sync)</li>
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<li>Special register reads ([N]TID, [N]CTAID, PMx, CLOCK, etc.)</li>
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</ul>
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<p>In Progress:</p>
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<ul>
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<li>Robust call instruction selection</li>
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<li>Stack frame allocation</li>
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<li>Device-specific instruction scheduling optimizations</li>
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</ul>
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</div>
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</div>
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