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This change handles a another case for generating the bic instruction
when a compile time constant is known. This occurs when implicitly zero extending function arguments from 16 bits to 32 bits. <rdar://problem/11481151> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157966 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -62,6 +62,14 @@ def t2_so_imm_neg_XFORM : SDNodeXForm<imm, [{
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return CurDAG->getTargetConstant(-((int)N->getZExtValue()), MVT::i32);
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}]>;
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// so_imm_not_sext_XFORM - Return a so_imm value packed into the format
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// described for so_imm_not_sext def below.
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def t2_so_imm_not_sext_XFORM : SDNodeXForm<imm, [{
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APInt apIntN = N->getAPIntValue();
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unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue();
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return CurDAG->getTargetConstant(~N16bitSignExt, MVT::i32);
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}]>;
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// t2_so_imm - Match a 32-bit immediate operand, which is an
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// 8-bit immediate rotated by an arbitrary number of bits, or an 8-bit
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// immediate splatted into multiple bytes of the word.
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@ -86,6 +94,17 @@ def t2_so_imm_not : Operand<i32>, PatLeaf<(imm), [{
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let ParserMatchClass = t2_so_imm_not_asmoperand;
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}
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// t2_so_imm_not_sext - Match an immediate that when zero-extended
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// from 16-bits to 32-bits is a complement of a t2_so_imm.
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def t2_so_imm_not_sext : Operand<i32>, PatLeaf<(imm), [{
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APInt apIntN = N->getAPIntValue();
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if (!apIntN.isIntN(16)) return false;
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unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue();
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return ARM_AM::getT2SOImmVal(~N16bitSignExt) != -1;
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}], t2_so_imm_not_sext_XFORM> {
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let ParserMatchClass = t2_so_imm_not_asmoperand;
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}
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// t2_so_imm_neg - Match an immediate that is a negation of a t2_so_imm.
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def t2_so_imm_neg_asmoperand : AsmOperandClass { let Name = "T2SOImmNeg"; }
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def t2_so_imm_neg : Operand<i32>, PatLeaf<(imm), [{
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@ -2332,6 +2351,11 @@ let AddedComplexity = 1 in
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def : T2Pat<(and rGPR:$src, t2_so_imm_not:$imm),
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(t2BICri rGPR:$src, t2_so_imm_not:$imm)>;
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// so_imm_not_sext is needed instead of so_imm_not, as the value of imm
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// will match the original bitWidth for $src.
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def : T2Pat<(and rGPR:$src, t2_so_imm_not_sext:$imm),
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(t2BICri rGPR:$src, t2_so_imm_not_sext:$imm)>;
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// FIXME: Disable this pattern on Darwin to workaround an assembler bug.
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def : T2Pat<(or rGPR:$src, t2_so_imm_not:$imm),
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(t2ORNri rGPR:$src, t2_so_imm_not:$imm)>,
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19
test/CodeGen/ARM/bicNoZext.ll
Normal file
19
test/CodeGen/ARM/bicNoZext.ll
Normal file
@ -0,0 +1,19 @@
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; RUN: llc %s -o - | FileCheck %s
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; ModuleID = 'bic.c'
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target triple = "thumbv7-apple-ios3.0.0"
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define zeroext i16 @foo16(i16 zeroext %f) nounwind readnone optsize ssp {
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entry:
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; CHECK: .thumb_func _foo16
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; CHECK: {{bic[^#]*#3}}
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%and = and i16 %f, -4
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ret i16 %and
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}
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define i32 @foo32(i32 %f) nounwind readnone optsize ssp {
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entry:
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; CHECK: .thumb_func _foo32
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; CHECK: {{bic[^#]*#3}}
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%and = and i32 %f, -4
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ret i32 %and
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}
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