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Move condition out to prepare for more matching
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112805 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5181,6 +5181,11 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
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}
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}
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if (OptForSize) { // NOTE: isPSHUFDMask can also match this mask...
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if (HasSSE2 && X86::isUNPCKL_v_undef_Mask(SVOp) && VT == MVT::v4i32)
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return getTargetShuffleNode(X86ISD::PUNPCKLDQ, dl, VT, V1, V1, DAG);
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}
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if (X86::isPSHUFDMask(SVOp)) {
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// The actual implementation will match the mask in the if above and then
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// during isel it can match several different instructions, not only pshufd
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@ -5188,10 +5193,6 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const {
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if (X86::isMOVDDUPMask(SVOp) && ((VT == MVT::v4f32 || VT == MVT::v2i64)))
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return getTargetShuffleNode(X86ISD::MOVLHPS, dl, VT, V1, V1, DAG);
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if (OptForSize && HasSSE2 && X86::isUNPCKL_v_undef_Mask(SVOp) &&
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VT == MVT::v4i32)
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return getTargetShuffleNode(X86ISD::PUNPCKLDQ, dl, VT, V1, V1, DAG);
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unsigned TargetMask = X86::getShuffleSHUFImmediate(SVOp);
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if (HasSSE2 && (VT == MVT::v4f32 || VT == MVT::v4i32))
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