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R600/SI: Try to fix BFE operands when moving to VALU

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This was broken by r208479

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208740 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault 2014-05-13 23:45:50 +00:00
parent f057625676
commit dda22295e4
2 changed files with 10 additions and 1 deletions
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2
lib/Target/R600/SIInstrInfo.cpp
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@ -1217,12 +1217,12 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const {
Inst->RemoveOperand(2); // Remove old immediate.
Inst->addOperand(Inst->getOperand(1));
Inst->getOperand(1).ChangeToImmediate(0);
Inst->addOperand(MachineOperand::CreateImm(0));
Inst->addOperand(MachineOperand::CreateImm(Offset));
Inst->addOperand(MachineOperand::CreateImm(0));
Inst->addOperand(MachineOperand::CreateImm(BitWidth));
Inst->addOperand(MachineOperand::CreateImm(0));
Inst->addOperand(MachineOperand::CreateImm(0));
Inst->addOperand(MachineOperand::CreateImm(0));
}
// Update the destination register class.

9
test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll
View File

@ -39,3 +39,12 @@ define void @bfe_i32_imm_arg_arg(i32 addrspace(1)* %out, i32 %src1, i32 %src2) n
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
ret void
}
; FUNC-LABEL: @v_bfe_print_arg
; SI: V_BFE_I32 v{{[0-9]+}}, v{{[0-9]+}}, 2, 8
define void @v_bfe_print_arg(i32 addrspace(1)* %out, i32 addrspace(1)* %src0) nounwind {
%load = load i32 addrspace(1)* %src0, align 4
%bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %load, i32 2, i32 8) nounwind readnone
store i32 %bfe_i32, i32 addrspace(1)* %out, align 4
ret void
}