mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
[SystemZ] Make use of SUBTRACT HALFWORD
Thanks to Ulrich Weigand for noticing that this instruction was missing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181893 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
e66ef73318
commit
ddbf053a4c
@ -478,6 +478,7 @@ let Defs = [PSW] in {
|
||||
def SGR : BinaryRRE<"sgr", 0xB909, sub, GR64, GR64>;
|
||||
|
||||
// Subtraction of memory.
|
||||
defm SH : BinaryRXPair<"sh", 0x4B, 0xE37B, sub, GR32, sextloadi16>;
|
||||
defm S : BinaryRXPair<"s", 0x5B, 0xE35B, sub, GR32, load>;
|
||||
def SGF : BinaryRXY<"sgf", 0xE319, sub, GR64, sextloadi32>;
|
||||
def SG : BinaryRXY<"sg", 0xE309, sub, GR64, load>;
|
||||
|
131
test/CodeGen/SystemZ/int-sub-07.ll
Normal file
131
test/CodeGen/SystemZ/int-sub-07.ll
Normal file
@ -0,0 +1,131 @@
|
||||
; Test 32-bit subtraction in which the second operand is a sign-extended
|
||||
; i16 memory value.
|
||||
;
|
||||
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
|
||||
|
||||
; Check the low end of the SH range.
|
||||
define i32 @f1(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f1:
|
||||
; CHECK: sh %r2, 0(%r3)
|
||||
; CHECK: br %r14
|
||||
%half = load i16 *%src
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check the high end of the aligned SH range.
|
||||
define i32 @f2(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f2:
|
||||
; CHECK: sh %r2, 4094(%r3)
|
||||
; CHECK: br %r14
|
||||
%ptr = getelementptr i16 *%src, i64 2047
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check the next halfword up, which should use SHY instead of SH.
|
||||
define i32 @f3(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f3:
|
||||
; CHECK: shy %r2, 4096(%r3)
|
||||
; CHECK: br %r14
|
||||
%ptr = getelementptr i16 *%src, i64 2048
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check the high end of the aligned SHY range.
|
||||
define i32 @f4(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f4:
|
||||
; CHECK: shy %r2, 524286(%r3)
|
||||
; CHECK: br %r14
|
||||
%ptr = getelementptr i16 *%src, i64 262143
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check the next halfword up, which needs separate address logic.
|
||||
; Other sequences besides this one would be OK.
|
||||
define i32 @f5(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f5:
|
||||
; CHECK: agfi %r3, 524288
|
||||
; CHECK: sh %r2, 0(%r3)
|
||||
; CHECK: br %r14
|
||||
%ptr = getelementptr i16 *%src, i64 262144
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check the high end of the negative aligned SHY range.
|
||||
define i32 @f6(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f6:
|
||||
; CHECK: shy %r2, -2(%r3)
|
||||
; CHECK: br %r14
|
||||
%ptr = getelementptr i16 *%src, i64 -1
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check the low end of the SHY range.
|
||||
define i32 @f7(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f7:
|
||||
; CHECK: shy %r2, -524288(%r3)
|
||||
; CHECK: br %r14
|
||||
%ptr = getelementptr i16 *%src, i64 -262144
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check the next halfword down, which needs separate address logic.
|
||||
; Other sequences besides this one would be OK.
|
||||
define i32 @f8(i32 %lhs, i16 *%src) {
|
||||
; CHECK: f8:
|
||||
; CHECK: agfi %r3, -524290
|
||||
; CHECK: sh %r2, 0(%r3)
|
||||
; CHECK: br %r14
|
||||
%ptr = getelementptr i16 *%src, i64 -262145
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check that SH allows an index.
|
||||
define i32 @f9(i32 %lhs, i64 %src, i64 %index) {
|
||||
; CHECK: f9:
|
||||
; CHECK: sh %r2, 4094({{%r4,%r3|%r3,%r4}})
|
||||
; CHECK: br %r14
|
||||
%sub1 = add i64 %src, %index
|
||||
%sub2 = add i64 %sub1, 4094
|
||||
%ptr = inttoptr i64 %sub2 to i16 *
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
||||
|
||||
; Check that SHY allows an index.
|
||||
define i32 @f10(i32 %lhs, i64 %src, i64 %index) {
|
||||
; CHECK: f10:
|
||||
; CHECK: shy %r2, 4096({{%r4,%r3|%r3,%r4}})
|
||||
; CHECK: br %r14
|
||||
%sub1 = add i64 %src, %index
|
||||
%sub2 = add i64 %sub1, 4096
|
||||
%ptr = inttoptr i64 %sub2 to i16 *
|
||||
%half = load i16 *%ptr
|
||||
%rhs = sext i16 %half to i32
|
||||
%res = sub i32 %lhs, %rhs
|
||||
ret i32 %res
|
||||
}
|
@ -4879,6 +4879,57 @@
|
||||
# CHECK: sg %r15, 0
|
||||
0xe3 0xf0 0x00 0x00 0x00 0x09
|
||||
|
||||
# CHECK: sh %r0, 0
|
||||
0x4b 0x00 0x00 0x00
|
||||
|
||||
# CHECK: sh %r0, 4095
|
||||
0x4b 0x00 0x0f 0xff
|
||||
|
||||
# CHECK: sh %r0, 0(%r1)
|
||||
0x4b 0x00 0x10 0x00
|
||||
|
||||
# CHECK: sh %r0, 0(%r15)
|
||||
0x4b 0x00 0xf0 0x00
|
||||
|
||||
# CHECK: sh %r0, 4095(%r1,%r15)
|
||||
0x4b 0x01 0xff 0xff
|
||||
|
||||
# CHECK: sh %r0, 4095(%r15,%r1)
|
||||
0x4b 0x0f 0x1f 0xff
|
||||
|
||||
# CHECK: sh %r15, 0
|
||||
0x4b 0xf0 0x00 0x00
|
||||
|
||||
# CHECK: shy %r0, -524288
|
||||
0xe3 0x00 0x00 0x00 0x80 0x7b
|
||||
|
||||
# CHECK: shy %r0, -1
|
||||
0xe3 0x00 0x0f 0xff 0xff 0x7b
|
||||
|
||||
# CHECK: shy %r0, 0
|
||||
0xe3 0x00 0x00 0x00 0x00 0x7b
|
||||
|
||||
# CHECK: shy %r0, 1
|
||||
0xe3 0x00 0x00 0x01 0x00 0x7b
|
||||
|
||||
# CHECK: shy %r0, 524287
|
||||
0xe3 0x00 0x0f 0xff 0x7f 0x7b
|
||||
|
||||
# CHECK: shy %r0, 0(%r1)
|
||||
0xe3 0x00 0x10 0x00 0x00 0x7b
|
||||
|
||||
# CHECK: shy %r0, 0(%r15)
|
||||
0xe3 0x00 0xf0 0x00 0x00 0x7b
|
||||
|
||||
# CHECK: shy %r0, 524287(%r1,%r15)
|
||||
0xe3 0x01 0xff 0xff 0x7f 0x7b
|
||||
|
||||
# CHECK: shy %r0, 524287(%r15,%r1)
|
||||
0xe3 0x0f 0x1f 0xff 0x7f 0x7b
|
||||
|
||||
# CHECK: shy %r15, 0
|
||||
0xe3 0xf0 0x00 0x00 0x00 0x7b
|
||||
|
||||
# CHECK: slbgr %r0, %r0
|
||||
0xb9 0x89 0x00 0x00
|
||||
|
||||
|
@ -2337,6 +2337,22 @@
|
||||
sgf %r0, -524289
|
||||
sgf %r0, 524288
|
||||
|
||||
#CHECK: error: invalid operand
|
||||
#CHECK: sh %r0, -1
|
||||
#CHECK: error: invalid operand
|
||||
#CHECK: sh %r0, 4096
|
||||
|
||||
sh %r0, -1
|
||||
sh %r0, 4096
|
||||
|
||||
#CHECK: error: invalid operand
|
||||
#CHECK: shy %r0, -524289
|
||||
#CHECK: error: invalid operand
|
||||
#CHECK: shy %r0, 524288
|
||||
|
||||
shy %r0, -524289
|
||||
shy %r0, 524288
|
||||
|
||||
#CHECK: error: invalid operand
|
||||
#CHECK: sl %r0, -1
|
||||
#CHECK: error: invalid operand
|
||||
|
@ -5081,6 +5081,44 @@
|
||||
sgr %r15,%r0
|
||||
sgr %r7,%r8
|
||||
|
||||
#CHECK: sh %r0, 0 # encoding: [0x4b,0x00,0x00,0x00]
|
||||
#CHECK: sh %r0, 4095 # encoding: [0x4b,0x00,0x0f,0xff]
|
||||
#CHECK: sh %r0, 0(%r1) # encoding: [0x4b,0x00,0x10,0x00]
|
||||
#CHECK: sh %r0, 0(%r15) # encoding: [0x4b,0x00,0xf0,0x00]
|
||||
#CHECK: sh %r0, 4095(%r1,%r15) # encoding: [0x4b,0x01,0xff,0xff]
|
||||
#CHECK: sh %r0, 4095(%r15,%r1) # encoding: [0x4b,0x0f,0x1f,0xff]
|
||||
#CHECK: sh %r15, 0 # encoding: [0x4b,0xf0,0x00,0x00]
|
||||
|
||||
sh %r0, 0
|
||||
sh %r0, 4095
|
||||
sh %r0, 0(%r1)
|
||||
sh %r0, 0(%r15)
|
||||
sh %r0, 4095(%r1,%r15)
|
||||
sh %r0, 4095(%r15,%r1)
|
||||
sh %r15, 0
|
||||
|
||||
#CHECK: shy %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x7b]
|
||||
#CHECK: shy %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x7b]
|
||||
#CHECK: shy %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x7b]
|
||||
#CHECK: shy %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0x7b]
|
||||
#CHECK: shy %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x7b]
|
||||
#CHECK: shy %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0x7b]
|
||||
#CHECK: shy %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x7b]
|
||||
#CHECK: shy %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x7b]
|
||||
#CHECK: shy %r0, 524287(%r15,%r1) # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x7b]
|
||||
#CHECK: shy %r15, 0 # encoding: [0xe3,0xf0,0x00,0x00,0x00,0x7b]
|
||||
|
||||
shy %r0, -524288
|
||||
shy %r0, -1
|
||||
shy %r0, 0
|
||||
shy %r0, 1
|
||||
shy %r0, 524287
|
||||
shy %r0, 0(%r1)
|
||||
shy %r0, 0(%r15)
|
||||
shy %r0, 524287(%r1,%r15)
|
||||
shy %r0, 524287(%r15,%r1)
|
||||
shy %r15, 0
|
||||
|
||||
#CHECK: sl %r0, 0 # encoding: [0x5f,0x00,0x00,0x00]
|
||||
#CHECK: sl %r0, 4095 # encoding: [0x5f,0x00,0x0f,0xff]
|
||||
#CHECK: sl %r0, 0(%r1) # encoding: [0x5f,0x00,0x10,0x00]
|
||||
|
Loading…
Reference in New Issue
Block a user