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Get rid of all uses of LiveVariables::VarInfo::DefInst in favor of the equivalent API from
MachineRegisterInfo. Once all clients are switched over, the former will be going away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45805 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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@ -121,7 +121,8 @@ namespace {
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void computeDFS(MachineFunction& MF);
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void computeDFS(MachineFunction& MF);
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void processBlock(MachineBasicBlock* MBB);
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void processBlock(MachineBasicBlock* MBB);
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std::vector<DomForestNode*> computeDomForest(std::set<unsigned>& instrs);
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std::vector<DomForestNode*> computeDomForest(std::set<unsigned>& instrs,
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MachineRegisterInfo& MRI);
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void processPHIUnion(MachineInstr* Inst,
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void processPHIUnion(MachineInstr* Inst,
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std::set<unsigned>& PHIUnion,
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std::set<unsigned>& PHIUnion,
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std::vector<StrongPHIElimination::DomForestNode*>& DF,
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std::vector<StrongPHIElimination::DomForestNode*>& DF,
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@ -186,18 +187,18 @@ void StrongPHIElimination::computeDFS(MachineFunction& MF) {
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class PreorderSorter {
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class PreorderSorter {
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private:
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private:
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DenseMap<MachineBasicBlock*, unsigned>& preorder;
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DenseMap<MachineBasicBlock*, unsigned>& preorder;
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LiveVariables& LV;
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MachineRegisterInfo& MRI;
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public:
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public:
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PreorderSorter(DenseMap<MachineBasicBlock*, unsigned>& p,
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PreorderSorter(DenseMap<MachineBasicBlock*, unsigned>& p,
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LiveVariables& L) : preorder(p), LV(L) { }
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MachineRegisterInfo& M) : preorder(p), MRI(M) { }
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bool operator()(unsigned A, unsigned B) {
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bool operator()(unsigned A, unsigned B) {
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if (A == B)
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if (A == B)
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return false;
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return false;
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MachineBasicBlock* ABlock = LV.getVarInfo(A).DefInst->getParent();
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MachineBasicBlock* ABlock = MRI.getVRegDef(A)->getParent();
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MachineBasicBlock* BBlock = LV.getVarInfo(A).DefInst->getParent();
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MachineBasicBlock* BBlock = MRI.getVRegDef(B)->getParent();
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if (preorder[ABlock] < preorder[BBlock])
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if (preorder[ABlock] < preorder[BBlock])
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return true;
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return true;
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@ -211,9 +212,8 @@ public:
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/// computeDomForest - compute the subforest of the DomTree corresponding
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/// computeDomForest - compute the subforest of the DomTree corresponding
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/// to the defining blocks of the registers in question
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/// to the defining blocks of the registers in question
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std::vector<StrongPHIElimination::DomForestNode*>
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std::vector<StrongPHIElimination::DomForestNode*>
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StrongPHIElimination::computeDomForest(std::set<unsigned>& regs) {
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StrongPHIElimination::computeDomForest(std::set<unsigned>& regs,
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LiveVariables& LV = getAnalysis<LiveVariables>();
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MachineRegisterInfo& MRI) {
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// Begin by creating a virtual root node, since the actual results
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// Begin by creating a virtual root node, since the actual results
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// may well be a forest. Assume this node has maximum DFS-out number.
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// may well be a forest. Assume this node has maximum DFS-out number.
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DomForestNode* VirtualRoot = new DomForestNode(0, 0);
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DomForestNode* VirtualRoot = new DomForestNode(0, 0);
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@ -227,7 +227,7 @@ StrongPHIElimination::computeDomForest(std::set<unsigned>& regs) {
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worklist.push_back(*I);
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worklist.push_back(*I);
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// Sort the registers by the DFS-in number of their defining block
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// Sort the registers by the DFS-in number of their defining block
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PreorderSorter PS(preorder, LV);
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PreorderSorter PS(preorder, MRI);
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std::sort(worklist.begin(), worklist.end(), PS);
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std::sort(worklist.begin(), worklist.end(), PS);
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// Create a "current parent" stack, and put the virtual root on top of it
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// Create a "current parent" stack, and put the virtual root on top of it
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@ -238,9 +238,9 @@ StrongPHIElimination::computeDomForest(std::set<unsigned>& regs) {
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// Iterate over all the registers in the previously computed order
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// Iterate over all the registers in the previously computed order
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for (std::vector<unsigned>::iterator I = worklist.begin(), E = worklist.end();
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for (std::vector<unsigned>::iterator I = worklist.begin(), E = worklist.end();
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I != E; ++I) {
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I != E; ++I) {
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unsigned pre = preorder[LV.getVarInfo(*I).DefInst->getParent()];
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unsigned pre = preorder[MRI.getVRegDef(*I)->getParent()];
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MachineBasicBlock* parentBlock = CurrentParent->getReg() ?
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MachineBasicBlock* parentBlock = CurrentParent->getReg() ?
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LV.getVarInfo(CurrentParent->getReg()).DefInst->getParent() :
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MRI.getVRegDef(CurrentParent->getReg())->getParent() :
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0;
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0;
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// If the DFS-in number of the register is greater than the DFS-out number
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// If the DFS-in number of the register is greater than the DFS-out number
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@ -250,7 +250,7 @@ StrongPHIElimination::computeDomForest(std::set<unsigned>& regs) {
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CurrentParent = stack.back();
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CurrentParent = stack.back();
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parentBlock = CurrentParent->getReg() ?
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parentBlock = CurrentParent->getReg() ?
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LV.getVarInfo(CurrentParent->getReg()).DefInst->getParent() :
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MRI.getVRegDef(CurrentParent->getReg())->getParent() :
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0;
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0;
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}
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}
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@ -271,11 +271,13 @@ StrongPHIElimination::computeDomForest(std::set<unsigned>& regs) {
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/// isLiveIn - helper method that determines, from a VarInfo, if a register
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/// isLiveIn - helper method that determines, from a VarInfo, if a register
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/// is live into a block
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/// is live into a block
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static bool isLiveIn(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
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static bool isLiveIn(unsigned r, MachineBasicBlock* MBB,
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MachineRegisterInfo& MRI, LiveVariables& LV) {
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LiveVariables::VarInfo V = LV.getVarInfo(r);
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if (V.AliveBlocks.test(MBB->getNumber()))
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if (V.AliveBlocks.test(MBB->getNumber()))
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return true;
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return true;
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if (V.DefInst->getParent() != MBB &&
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if (MRI.getVRegDef(r)->getParent() != MBB &&
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V.UsedBlocks.test(MBB->getNumber()))
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V.UsedBlocks.test(MBB->getNumber()))
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return true;
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return true;
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@ -284,8 +286,10 @@ static bool isLiveIn(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
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/// isLiveOut - help method that determines, from a VarInfo, if a register is
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/// isLiveOut - help method that determines, from a VarInfo, if a register is
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/// live out of a block.
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/// live out of a block.
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static bool isLiveOut(LiveVariables::VarInfo& V, MachineBasicBlock* MBB) {
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static bool isLiveOut(unsigned r, MachineBasicBlock* MBB,
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if (MBB == V.DefInst->getParent() ||
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MachineRegisterInfo& MRI, LiveVariables& LV) {
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LiveVariables::VarInfo& V = LV.getVarInfo(r);
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if (MBB == MRI.getVRegDef(r)->getParent() ||
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V.UsedBlocks.test(MBB->getNumber())) {
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V.UsedBlocks.test(MBB->getNumber())) {
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for (std::vector<MachineInstr*>::iterator I = V.Kills.begin(),
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for (std::vector<MachineInstr*>::iterator I = V.Kills.begin(),
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E = V.Kills.end(); I != E; ++I)
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E = V.Kills.end(); I != E; ++I)
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@ -307,8 +311,9 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
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MachineInstr* def = 0;
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MachineInstr* def = 0;
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MachineInstr* kill = 0;
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MachineInstr* kill = 0;
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LiveVariables::VarInfo& First = LV.getVarInfo(a);
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// The code is still in SSA form at this point, so there is only one
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LiveVariables::VarInfo& Second = LV.getVarInfo(b);
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// definition per VReg. Thus we can safely use MRI->getVRegDef().
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const MachineRegisterInfo* MRI = &scan->getParent()->getRegInfo();
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bool interference = false;
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bool interference = false;
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@ -319,23 +324,23 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
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// Same defining block...
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// Same defining block...
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if (mode == 0) {
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if (mode == 0) {
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if (curr == First.DefInst) {
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if (curr == MRI->getVRegDef(a)) {
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// If we find our first DefInst, save it
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// If we find our first definition, save it
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if (!def) {
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if (!def) {
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def = curr;
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def = curr;
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// If there's already an unkilled DefInst, then
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// If there's already an unkilled definition, then
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// this is an interference
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// this is an interference
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} else if (!kill) {
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} else if (!kill) {
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interference = true;
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interference = true;
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break;
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break;
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// If there's a DefInst followed by a KillInst, then
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// If there's a definition followed by a KillInst, then
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// they can't interfere
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// they can't interfere
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} else {
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} else {
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interference = false;
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interference = false;
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break;
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break;
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}
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}
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// Symmetric with the above
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// Symmetric with the above
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} else if (curr == Second.DefInst ) {
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} else if (curr == MRI->getVRegDef(b)) {
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if (!def) {
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if (!def) {
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def = curr;
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def = curr;
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} else if (!kill) {
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} else if (!kill) {
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@ -345,24 +350,24 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
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interference = false;
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interference = false;
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break;
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break;
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}
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}
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// Store KillInsts if they match up with the DefInst
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// Store KillInsts if they match up with the definition
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} else if (LV.KillsRegister(curr, a)) {
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} else if (LV.KillsRegister(curr, a)) {
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if (def == First.DefInst) {
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if (def == MRI->getVRegDef(a)) {
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kill = curr;
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kill = curr;
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} else if (LV.KillsRegister(curr, b)) {
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} else if (LV.KillsRegister(curr, b)) {
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if (def == Second.DefInst) {
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if (def == MRI->getVRegDef(b)) {
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kill = curr;
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kill = curr;
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}
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}
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}
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}
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}
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}
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// First properly dominates second...
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// First properly dominates second...
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} else if (mode == 1) {
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} else if (mode == 1) {
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if (curr == Second.DefInst) {
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if (curr == MRI->getVRegDef(b)) {
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// DefInst of second without kill of first is an interference
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// Definition of second without kill of first is an interference
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if (!kill) {
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if (!kill) {
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interference = true;
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interference = true;
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break;
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break;
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// DefInst after a kill is a non-interference
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// Definition after a kill is a non-interference
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} else {
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} else {
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interference = false;
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interference = false;
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break;
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break;
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@ -373,7 +378,7 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
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}
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}
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// Symmetric with the above
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// Symmetric with the above
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} else if (mode == 2) {
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} else if (mode == 2) {
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if (curr == First.DefInst) {
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if (curr == MRI->getVRegDef(a)) {
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if (!kill) {
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if (!kill) {
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interference = true;
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interference = true;
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break;
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break;
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@ -396,6 +401,7 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
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/// which treatment.
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/// which treatment.
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void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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LiveVariables& LV = getAnalysis<LiveVariables>();
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LiveVariables& LV = getAnalysis<LiveVariables>();
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MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
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// Holds names that have been added to a set in any PHI within this block
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// Holds names that have been added to a set in any PHI within this block
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// before the current one.
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// before the current one.
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@ -404,8 +410,6 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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// Iterate over all the PHI nodes in this block
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// Iterate over all the PHI nodes in this block
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MachineBasicBlock::iterator P = MBB->begin();
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MachineBasicBlock::iterator P = MBB->begin();
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while (P != MBB->end() && P->getOpcode() == TargetInstrInfo::PHI) {
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while (P != MBB->end() && P->getOpcode() == TargetInstrInfo::PHI) {
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LiveVariables::VarInfo& PHIInfo = LV.getVarInfo(P->getOperand(0).getReg());
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unsigned DestReg = P->getOperand(0).getReg();
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unsigned DestReg = P->getOperand(0).getReg();
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// PHIUnion is the set of incoming registers to the PHI node that
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// PHIUnion is the set of incoming registers to the PHI node that
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@ -418,7 +422,6 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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// Iterate over the operands of the PHI node
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// Iterate over the operands of the PHI node
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for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
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for (int i = P->getNumOperands() - 1; i >= 2; i-=2) {
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unsigned SrcReg = P->getOperand(i-1).getReg();
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unsigned SrcReg = P->getOperand(i-1).getReg();
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LiveVariables::VarInfo& SrcInfo = LV.getVarInfo(SrcReg);
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// Check for trivial interferences via liveness information, allowing us
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// Check for trivial interferences via liveness information, allowing us
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// to avoid extra work later. Any registers that interfere cannot both
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// to avoid extra work later. Any registers that interfere cannot both
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@ -432,12 +435,14 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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// in this block OR
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// in this block OR
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// 5) if any two operands are defined in the same block, insert copies
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// 5) if any two operands are defined in the same block, insert copies
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// for one of them
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// for one of them
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if (isLiveIn(SrcInfo, P->getParent()) ||
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if (isLiveIn(SrcReg, P->getParent(), MRI, LV) ||
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isLiveOut(PHIInfo, SrcInfo.DefInst->getParent()) ||
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isLiveOut(P->getOperand(0).getReg(),
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( PHIInfo.DefInst->getOpcode() == TargetInstrInfo::PHI &&
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MRI.getVRegDef(SrcReg)->getParent(), MRI, LV) ||
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isLiveIn(PHIInfo, SrcInfo.DefInst->getParent()) ) ||
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( MRI.getVRegDef(SrcReg)->getOpcode() == TargetInstrInfo::PHI &&
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isLiveIn(P->getOperand(0).getReg(),
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MRI.getVRegDef(SrcReg)->getParent(), MRI, LV) ) ||
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ProcessedNames.count(SrcReg) ||
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ProcessedNames.count(SrcReg) ||
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UnionedBlocks.count(SrcInfo.DefInst->getParent())) {
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UnionedBlocks.count(MRI.getVRegDef(SrcReg)->getParent())) {
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// Add a copy for the selected register
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// Add a copy for the selected register
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MachineBasicBlock* From = P->getOperand(i).getMBB();
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MachineBasicBlock* From = P->getOperand(i).getMBB();
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@ -446,7 +451,7 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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} else {
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} else {
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// Otherwise, add it to the renaming set
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// Otherwise, add it to the renaming set
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PHIUnion.insert(SrcReg);
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PHIUnion.insert(SrcReg);
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UnionedBlocks.insert(SrcInfo.DefInst->getParent());
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UnionedBlocks.insert(MRI.getVRegDef(SrcReg)->getParent());
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}
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}
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}
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}
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@ -454,7 +459,7 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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// where the nodes are the registers and the edges represent dominance
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// where the nodes are the registers and the edges represent dominance
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// relations between the defining blocks of the registers
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// relations between the defining blocks of the registers
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std::vector<StrongPHIElimination::DomForestNode*> DF =
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std::vector<StrongPHIElimination::DomForestNode*> DF =
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computeDomForest(PHIUnion);
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computeDomForest(PHIUnion, MRI);
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// Walk DomForest to resolve interferences at an inter-block level. This
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// Walk DomForest to resolve interferences at an inter-block level. This
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// will remove registers from the renaming set (and insert copies for them)
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// will remove registers from the renaming set (and insert copies for them)
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@ -469,24 +474,22 @@ void StrongPHIElimination::processBlock(MachineBasicBlock* MBB) {
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localInterferences.begin(), E = localInterferences.end(); I != E; ++I) {
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localInterferences.begin(), E = localInterferences.end(); I != E; ++I) {
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std::pair<unsigned, unsigned> p = *I;
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std::pair<unsigned, unsigned> p = *I;
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LiveVariables::VarInfo& FirstInfo = LV.getVarInfo(p.first);
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LiveVariables::VarInfo& SecondInfo = LV.getVarInfo(p.second);
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MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
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MachineDominatorTree& MDT = getAnalysis<MachineDominatorTree>();
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// Determine the block we need to scan and the relationship between
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// Determine the block we need to scan and the relationship between
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// the two registers
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// the two registers
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MachineBasicBlock* scan = 0;
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MachineBasicBlock* scan = 0;
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unsigned mode = 0;
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unsigned mode = 0;
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if (FirstInfo.DefInst->getParent() == SecondInfo.DefInst->getParent()) {
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if (MRI.getVRegDef(p.first)->getParent() ==
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scan = FirstInfo.DefInst->getParent();
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MRI.getVRegDef(p.second)->getParent()) {
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scan = MRI.getVRegDef(p.first)->getParent();
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mode = 0; // Same block
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mode = 0; // Same block
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} else if (MDT.dominates(FirstInfo.DefInst->getParent(),
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} else if (MDT.dominates(MRI.getVRegDef(p.first)->getParent(),
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SecondInfo.DefInst->getParent())) {
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MRI.getVRegDef(p.second)->getParent())) {
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scan = SecondInfo.DefInst->getParent();
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scan = MRI.getVRegDef(p.second)->getParent();
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mode = 1; // First dominates second
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mode = 1; // First dominates second
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} else {
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} else {
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scan = FirstInfo.DefInst->getParent();
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scan = MRI.getVRegDef(p.first)->getParent();
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mode = 2; // Second dominates first
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mode = 2; // Second dominates first
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}
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}
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@ -531,6 +534,9 @@ void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
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std::vector<DomForestNode*> worklist(DF.begin(), DF.end());
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std::vector<DomForestNode*> worklist(DF.begin(), DF.end());
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SmallPtrSet<DomForestNode*, 4> visited;
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SmallPtrSet<DomForestNode*, 4> visited;
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// Code is still in SSA form, so we can use MRI::getVRegDef()
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|
MachineRegisterInfo& MRI = Inst->getParent()->getParent()->getRegInfo();
|
||||||
|
|
||||||
LiveVariables& LV = getAnalysis<LiveVariables>();
|
LiveVariables& LV = getAnalysis<LiveVariables>();
|
||||||
unsigned DestReg = Inst->getOperand(0).getReg();
|
unsigned DestReg = Inst->getOperand(0).getReg();
|
||||||
|
|
||||||
@ -538,16 +544,15 @@ void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
|
|||||||
while (!worklist.empty()) {
|
while (!worklist.empty()) {
|
||||||
DomForestNode* DFNode = worklist.back();
|
DomForestNode* DFNode = worklist.back();
|
||||||
|
|
||||||
LiveVariables::VarInfo& Info = LV.getVarInfo(DFNode->getReg());
|
|
||||||
visited.insert(DFNode);
|
visited.insert(DFNode);
|
||||||
|
|
||||||
bool inserted = false;
|
bool inserted = false;
|
||||||
for (DomForestNode::iterator CI = DFNode->begin(), CE = DFNode->end();
|
for (DomForestNode::iterator CI = DFNode->begin(), CE = DFNode->end();
|
||||||
CI != CE; ++CI) {
|
CI != CE; ++CI) {
|
||||||
DomForestNode* child = *CI;
|
DomForestNode* child = *CI;
|
||||||
LiveVariables::VarInfo& CInfo = LV.getVarInfo(child->getReg());
|
|
||||||
|
|
||||||
if (isLiveOut(Info, CInfo.DefInst->getParent())) {
|
if (isLiveOut(DFNode->getReg(),
|
||||||
|
MRI.getVRegDef(child->getReg())->getParent(), MRI, LV)) {
|
||||||
// Insert copies for parent
|
// Insert copies for parent
|
||||||
for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
|
for (int i = Inst->getNumOperands() - 1; i >= 2; i-=2) {
|
||||||
if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
|
if (Inst->getOperand(i-1).getReg() == DFNode->getReg()) {
|
||||||
@ -560,8 +565,11 @@ void StrongPHIElimination::processPHIUnion(MachineInstr* Inst,
|
|||||||
PHIUnion.erase(SrcReg);
|
PHIUnion.erase(SrcReg);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} else if (isLiveIn(Info, CInfo.DefInst->getParent()) ||
|
} else if (isLiveIn(DFNode->getReg(),
|
||||||
Info.DefInst->getParent() == CInfo.DefInst->getParent()) {
|
MRI.getVRegDef(child->getReg())->getParent(),
|
||||||
|
MRI, LV) ||
|
||||||
|
MRI.getVRegDef(DFNode->getReg())->getParent() ==
|
||||||
|
MRI.getVRegDef(child->getReg())->getParent()) {
|
||||||
// Add (p, c) to possible local interferences
|
// Add (p, c) to possible local interferences
|
||||||
locals.push_back(std::make_pair(DFNode->getReg(), child->getReg()));
|
locals.push_back(std::make_pair(DFNode->getReg(), child->getReg()));
|
||||||
}
|
}
|
||||||
@ -610,6 +618,7 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
|
|||||||
|
|
||||||
LiveVariables& LV = getAnalysis<LiveVariables>();
|
LiveVariables& LV = getAnalysis<LiveVariables>();
|
||||||
MachineFunction* MF = MBB->getParent();
|
MachineFunction* MF = MBB->getParent();
|
||||||
|
MachineRegisterInfo& MRI = MF->getRegInfo();
|
||||||
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
|
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
|
||||||
|
|
||||||
// Iterate over the worklist, inserting copies
|
// Iterate over the worklist, inserting copies
|
||||||
@ -620,15 +629,14 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
|
|||||||
|
|
||||||
const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
|
const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(curr.first);
|
||||||
|
|
||||||
if (isLiveOut(LV.getVarInfo(curr.second), MBB)) {
|
if (isLiveOut(curr.second, MBB, MRI, LV)) {
|
||||||
// Create a temporary
|
// Create a temporary
|
||||||
unsigned t = MF->getRegInfo().createVirtualRegister(RC);
|
unsigned t = MF->getRegInfo().createVirtualRegister(RC);
|
||||||
|
|
||||||
// Insert copy from curr.second to a temporary at
|
// Insert copy from curr.second to a temporary at
|
||||||
// the Phi defining curr.second
|
// the Phi defining curr.second
|
||||||
LiveVariables::VarInfo VI = LV.getVarInfo(curr.second);
|
MachineBasicBlock::iterator PI = MRI.getVRegDef(curr.second);
|
||||||
MachineBasicBlock::iterator PI = VI.DefInst;
|
TII->copyRegToReg(*PI->getParent(), PI, t,
|
||||||
TII->copyRegToReg(*VI.DefInst->getParent(), PI, t,
|
|
||||||
curr.second, RC, RC);
|
curr.second, RC, RC);
|
||||||
|
|
||||||
// Push temporary on Stacks
|
// Push temporary on Stacks
|
||||||
|
Loading…
Reference in New Issue
Block a user