From ddeed50d76e2ad52d3ccb3664d21dfe1463179c6 Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Sun, 12 Apr 2009 22:31:17 +0000 Subject: [PATCH] Use a hashtable for TargetRegisterClass::contains. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68922 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetRegisterInfo.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 45f9f2db901..69011477ca7 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -18,6 +18,7 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/ValueTypes.h" +#include "llvm/ADT/DenseSet.h" #include #include @@ -64,6 +65,7 @@ private: const unsigned RegSize, Alignment; // Size & Alignment of register in bytes const int CopyCost; const iterator RegsBegin, RegsEnd; + DenseSet RegSet; public: TargetRegisterClass(unsigned id, const char *name, @@ -73,7 +75,10 @@ public: unsigned RS, unsigned Al, int CC, iterator RB, iterator RE) : ID(id), Name(name), VTs(vts), SubClasses(subcs), SuperClasses(supcs), - RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) {} + RegSize(RS), Alignment(Al), CopyCost(CC), RegsBegin(RB), RegsEnd(RE) { + for (iterator I = RegsBegin, E = RegsEnd; I != E; ++I) + RegSet.insert(*I); + } virtual ~TargetRegisterClass() {} // Allow subclasses /// getID() - Return the register class ID number. @@ -103,9 +108,7 @@ public: /// contains - Return true if the specified register is included in this /// register class. bool contains(unsigned Reg) const { - for (iterator I = begin(), E = end(); I != E; ++I) - if (*I == Reg) return true; - return false; + return RegSet.count(Reg); } /// hasType - return true if this TargetRegisterClass has the ValueType vt.