6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-06 14:57:41 +00:00
Code Issues Projects Releases Wiki Activity

XformToShuffleWithZero - Added clearer early outs and general tidy up. NFCI

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232557 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2015-03-17 22:19:08 +00:00
parent d65f223529
commit de0ccb2104
1 changed files with 38 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -12236,15 +12236,25 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
/// vector_shuffle V, Zero, <0, 4, 2, 4>
SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) {
EVT VT = N->getValueType(0);
SDLoc dl(N);
SDValue LHS = N->getOperand(0);
SDValue RHS = N->getOperand(1);
if (N->getOpcode() == ISD::AND) {
SDLoc dl(N);
// Make sure we're not running after operation legalization where it
// may have custom lowered the vector shuffles.
if (LegalOperations)
return SDValue();
if (N->getOpcode() != ISD::AND)
return SDValue();
if (RHS.getOpcode() == ISD::BITCAST)
RHS = RHS.getOperand(0);
if (RHS.getOpcode() == ISD::BUILD_VECTOR) {
SmallVector<int, 8> Indices;
unsigned NumElts = RHS.getNumOperands();
for (unsigned i = 0; i != NumElts; ++i) {
SDValue Elt = RHS.getOperand(i);
if (!isa<ConstantSDNode>(Elt))
@ -12258,11 +12268,9 @@ SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) {
return SDValue();
}
// Let's see if the target supports this vector_shuffle and make sure
// we're not running after operation legalization where it may have
// custom lowered the vector shuffles.
// Let's see if the target supports this vector_shuffle.
EVT RVT = RHS.getValueType();
if (LegalOperations || !TLI.isVectorClearMaskLegal(Indices, RVT))
if (!TLI.isVectorClearMaskLegal(Indices, RVT))
return SDValue();
// Return the new VECTOR_SHUFFLE node.
@ -12274,7 +12282,6 @@ SDValue DAGCombiner::XformToShuffleWithZero(SDNode *N) {
SDValue Shuf = DAG.getVectorShuffle(RVT, dl, LHS, Zero, &Indices[0]);
return DAG.getNode(ISD::BITCAST, dl, VT, Shuf);
}
}
return SDValue();
}