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Move non-temporal movs to their own section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107168 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2019,25 +2019,24 @@ defm RSQRT : sse1_fp_unop_s<0x52, "rsqrt", X86frsqrt, int_x86_sse_rsqrt_ss>,
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defm RCP : sse1_fp_unop_s<0x53, "rcp", X86frcp, int_x86_sse_rcp_ss>,
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sse1_fp_unop_p<0x53, "rcp", X86frcp, int_x86_sse_rcp_ps>;
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// Prefetch intrinsic.
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def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src),
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"prefetcht0\t$src", [(prefetch addr:$src, imm, (i32 3))]>;
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def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src),
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"prefetcht1\t$src", [(prefetch addr:$src, imm, (i32 2))]>;
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def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src),
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"prefetcht2\t$src", [(prefetch addr:$src, imm, (i32 1))]>;
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def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src),
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"prefetchnta\t$src", [(prefetch addr:$src, imm, (i32 0))]>;
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//===----------------------------------------------------------------------===//
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// SSE 1 & 2 - Non-temporal stores
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//===----------------------------------------------------------------------===//
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// Non-temporal stores
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def MOVNTPSmr_Int : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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"movntps\t{$src, $dst|$dst, $src}",
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[(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>;
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def MOVNTPDmr_Int : PDI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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"movntpd\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_pd addr:$dst, VR128:$src)]>;
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let AddedComplexity = 400 in { // Prefer non-temporal versions
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def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntps\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v4f32 VR128:$src), addr:$dst)]>;
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def MOVNTPDmr : PDI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntpd\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore(v2f64 VR128:$src), addr:$dst)]>;
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def MOVNTDQ_64mr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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@ -2052,8 +2051,37 @@ def MOVNTI_64mr : RI<0xC3, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
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"movnti\t{$src, $dst|$dst, $src}",
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[(nontemporalstore (i64 GR64:$src), addr:$dst)]>,
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TB, Requires<[HasSSE2]>;
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let ExeDomain = SSEPackedInt in
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def MOVNTDQmr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v4f32 VR128:$src), addr:$dst)]>;
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}
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let ExeDomain = SSEPackedInt in
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def MOVNTDQmr_Int : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_dq addr:$dst, VR128:$src)]>;
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def MOVNTImr_Int : I<0xC3, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
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"movnti\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_i addr:$dst, GR32:$src)]>,
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TB, Requires<[HasSSE2]>;
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//===----------------------------------------------------------------------===//
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// SSE 1 & 2 - Misc Instructions
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//===----------------------------------------------------------------------===//
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// Prefetch intrinsic.
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def PREFETCHT0 : PSI<0x18, MRM1m, (outs), (ins i8mem:$src),
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"prefetcht0\t$src", [(prefetch addr:$src, imm, (i32 3))]>;
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def PREFETCHT1 : PSI<0x18, MRM2m, (outs), (ins i8mem:$src),
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"prefetcht1\t$src", [(prefetch addr:$src, imm, (i32 2))]>;
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def PREFETCHT2 : PSI<0x18, MRM3m, (outs), (ins i8mem:$src),
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"prefetcht2\t$src", [(prefetch addr:$src, imm, (i32 1))]>;
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def PREFETCHNTA : PSI<0x18, MRM0m, (outs), (ins i8mem:$src),
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"prefetchnta\t$src", [(prefetch addr:$src, imm, (i32 0))]>;
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// Load, store, and memory fence
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def SFENCE : I<0xAE, MRM_F8, (outs), (ins), "sfence", [(int_x86_sse_sfence)]>,
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TB, Requires<[HasSSE1]>;
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@ -2496,30 +2524,6 @@ def MASKMOVDQU64 : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
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} // ExeDomain = SSEPackedInt
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// Non-temporal stores
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def MOVNTPDmr_Int : PDI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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"movntpd\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_pd addr:$dst, VR128:$src)]>;
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let ExeDomain = SSEPackedInt in
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def MOVNTDQmr_Int : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_dq addr:$dst, VR128:$src)]>;
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def MOVNTImr_Int : I<0xC3, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
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"movnti\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_i addr:$dst, GR32:$src)]>,
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TB, Requires<[HasSSE2]>;
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let AddedComplexity = 400 in { // Prefer non-temporal versions
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def MOVNTPDmr : PDI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntpd\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore(v2f64 VR128:$src), addr:$dst)]>;
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let ExeDomain = SSEPackedInt in
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def MOVNTDQmr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v4f32 VR128:$src), addr:$dst)]>;
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}
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// Flush cache
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def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
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"clflush\t$src", [(int_x86_sse2_clflush addr:$src)]>,
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