mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-17 03:07:06 +00:00
ARM assembly parser canonicallize on 'lsl' for shift-by-zero form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147152 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
18c8d12dea
commit
de626ad872
@ -2421,6 +2421,10 @@ int ARMAsmParser::tryParseShiftRegister(
|
||||
Error(ImmLoc, "immediate shift value out of range");
|
||||
return -1;
|
||||
}
|
||||
// shift by zero is a nop. Always send it through as lsl.
|
||||
// ('as' compatibility)
|
||||
if (Imm == 0)
|
||||
ShiftTy = ARM_AM::lsl;
|
||||
} else if (Parser.getTok().is(AsmToken::Identifier)) {
|
||||
ShiftReg = tryParseRegister();
|
||||
SMLoc L = Parser.getTok().getLoc();
|
||||
|
Loading…
Reference in New Issue
Block a user