6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-07 12:28:24 +00:00
Code Issues Projects Releases Wiki Activity

ARM: correct an off-by-one in an assert

Browse Source 
The assert was off-by-one, resulting in failures for valid input.

Thanks to Asiri Rathnayake for pointing out the failure!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224432 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Saleem Abdulrasool
2014-12-17 16:17:44 +00:00
parent fd350586f5
commit de9e32a55d
2 changed files with 10 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
View File

@@ -77,7 +77,10 @@ static bool getITDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
static bool getARMStoreDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, static bool getARMStoreDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
std::string &Info) { std::string &Info) {
assert(MI.getNumOperands() > 4 && "expected >4 arguments"); if (STI.getFeatureBits() & llvm::ARM::ModeThumb)
return false;
assert(MI.getNumOperands() >= 4 && "expected >= 4 arguments");
for (unsigned OI = 4, OE = MI.getNumOperands(); OI < OE; ++OI) { for (unsigned OI = 4, OE = MI.getNumOperands(); OI < OE; ++OI) {
assert(MI.getOperand(OI).isReg() && "expected register"); assert(MI.getOperand(OI).isReg() && "expected register");
if (MI.getOperand(OI).getReg() == ARM::SP || if (MI.getOperand(OI).getReg() == ARM::SP ||

6
test/MC/ARM/arm-store-deprecated.s
View File

@@ -145,3 +145,9 @@ push:
@ CHECK: push {sp} @ CHECK: push {sp}
@ CHECK: ^ @ CHECK: ^
.global single
.type single,%function
single:
stmdaeq r0, {r0}
@ CHECK-NOT: warning