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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 17:29:19 +00:00
Tidy up. Move for loop index declarations into for statements. Use unsigned instead of uint16_t for loop indices. Use unsigned instead of uint32_t for arguments to raw_ostream.indent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161033 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -170,7 +170,7 @@ static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
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}
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}
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void DisassemblerTables::emitOneID(raw_ostream &o, uint32_t &i, InstrUID id,
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void DisassemblerTables::emitOneID(raw_ostream &o, unsigned &i, InstrUID id,
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bool addComma) const {
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if (id)
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o.indent(i * 2) << format("0x%hx", id);
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@ -195,7 +195,7 @@ void DisassemblerTables::emitOneID(raw_ostream &o, uint32_t &i, InstrUID id,
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///
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/// @param o - The output stream on which to emit the table.
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/// @param i - The indentation level for that output stream.
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static void emitEmptyTable(raw_ostream &o, uint32_t &i) {
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static void emitEmptyTable(raw_ostream &o, unsigned &i) {
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o.indent(i * 2) << "0x0, /* EmptyTable */\n";
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}
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@ -209,9 +209,7 @@ static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
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bool satisfiesSplitRM = true;
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bool satisfiesSplitReg = true;
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uint16_t index;
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for (index = 0; index < 256; ++index) {
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for (unsigned index = 0; index < 256; ++index) {
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if (decision.instructionIDs[index] != decision.instructionIDs[0])
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satisfiesOneEntry = false;
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@ -295,12 +293,11 @@ DisassemblerTables::~DisassemblerTables() {
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}
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void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
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uint32_t &i1, uint32_t &i2,
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unsigned &i1, unsigned &i2,
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ModRMDecision &decision) const {
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static uint64_t sTableNumber = 0;
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static uint64_t sEntryNumber = 1;
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static uint32_t sTableNumber = 0;
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static uint32_t sEntryNumber = 1;
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ModRMDecisionType dt = getDecisionType(decision);
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uint16_t index;
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if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
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{
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@ -329,13 +326,13 @@ void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
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emitOneID(o1, i1, decision.instructionIDs[0xc0], true); // mod = 0b11
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break;
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case MODRM_SPLITREG:
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for (index = 0; index < 64; index += 8)
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for (unsigned index = 0; index < 64; index += 8)
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emitOneID(o1, i1, decision.instructionIDs[index], true);
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for (index = 0xc0; index < 256; index += 8)
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for (unsigned index = 0xc0; index < 256; index += 8)
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emitOneID(o1, i1, decision.instructionIDs[index], true);
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break;
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case MODRM_FULL:
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for (index = 0; index < 256; ++index)
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for (unsigned index = 0; index < 256; ++index)
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emitOneID(o1, i1, decision.instructionIDs[index], true);
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break;
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}
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@ -372,16 +369,14 @@ void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
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}
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void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
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uint32_t &i1, uint32_t &i2,
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unsigned &i1, unsigned &i2,
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OpcodeDecision &decision) const {
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uint16_t index;
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o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
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i2++;
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o2.indent(i2) << "{" << "\n";
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i2++;
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for (index = 0; index < 256; ++index) {
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for (unsigned index = 0; index < 256; ++index) {
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o2.indent(i2);
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o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
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@ -401,7 +396,7 @@ void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
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}
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void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
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uint32_t &i1, uint32_t &i2,
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unsigned &i1, unsigned &i2,
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ContextDecision &decision,
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const char* name) const {
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o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
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@ -409,9 +404,7 @@ void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
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o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
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i2++;
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unsigned index;
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for (index = 0; index < IC_max; ++index) {
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for (unsigned index = 0; index < IC_max; ++index) {
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o2.indent(i2) << "/* ";
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o2 << stringForContext((InstructionContext)index);
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o2 << " */";
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@ -429,17 +422,16 @@ void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
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o2.indent(i2) << "};" << "\n";
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}
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void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
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const {
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void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
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unsigned &i) const {
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o.indent(i * 2) << "static const struct InstructionSpecifier ";
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o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
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i++;
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uint16_t numInstructions = InstructionSpecifiers.size();
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uint16_t index, operandIndex;
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unsigned numInstructions = InstructionSpecifiers.size();
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for (index = 0; index < numInstructions; ++index) {
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for (unsigned index = 0; index < numInstructions; ++index) {
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o.indent(i * 2) << "{ /* " << index << " */" << "\n";
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i++;
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@ -454,7 +446,8 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
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o.indent(i * 2) << "{" << "\n";
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i++;
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for (operandIndex = 0; operandIndex < X86_MAX_OPERANDS; ++operandIndex) {
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for (unsigned operandIndex = 0; operandIndex < X86_MAX_OPERANDS;
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++operandIndex) {
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o.indent(i * 2) << "{ ";
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o <<stringForOperandEncoding((OperandEncoding)InstructionSpecifiers[index]
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.operands[operandIndex]
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@ -490,14 +483,12 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
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o.indent(i * 2) << "};" << "\n";
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}
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void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
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uint16_t index;
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void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
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o.indent(i * 2) << "static const InstructionContext " CONTEXTS_STR
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"[256] = {\n";
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i++;
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for (index = 0; index < 256; ++index) {
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for (unsigned index = 0; index < 256; ++index) {
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o.indent(i * 2);
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if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
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@ -579,7 +570,7 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
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}
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void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
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uint32_t &i1, uint32_t &i2) const {
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unsigned &i1, unsigned &i2) const {
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emitContextDecision(o1, o2, i1, i2, *Tables[0], ONEBYTE_STR);
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emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
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emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
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@ -589,8 +580,8 @@ void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
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}
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void DisassemblerTables::emit(raw_ostream &o) const {
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uint32_t i1 = 0;
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uint32_t i2 = 0;
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unsigned i1 = 0;
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unsigned i2 = 0;
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std::string s1;
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std::string s2;
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@ -623,9 +614,7 @@ void DisassemblerTables::setTableFields(ModRMDecision &decision,
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const ModRMFilter &filter,
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InstrUID uid,
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uint8_t opcode) {
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unsigned index;
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for (index = 0; index < 256; ++index) {
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for (unsigned index = 0; index < 256; ++index) {
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if (filter.accepts(index)) {
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if (decision.instructionIDs[index] == uid)
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continue;
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@ -672,11 +661,9 @@ void DisassemblerTables::setTableFields(OpcodeType type,
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InstrUID uid,
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bool is32bit,
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bool ignoresVEX_L) {
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unsigned index;
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ContextDecision &decision = *Tables[type];
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for (index = 0; index < IC_max; ++index) {
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for (unsigned index = 0; index < IC_max; ++index) {
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if (is32bit && inheritsFrom((InstructionContext)index, IC_64BIT))
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continue;
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