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move fnstsw aliases to .td file, fix typo

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118349 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-11-06 18:58:32 +00:00
parent 7e925cc3c9
commit dea546b623
2 changed files with 6 additions and 36 deletions
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35
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -781,22 +781,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
X86Operand::CreateImm(One, NameLoc, NameLoc));
}
// FIXME: Hack to handle recognize "in[bwl] <op>". Canonicalize it to
// "inb <op>, %al".
if ((Name == "inb" || Name == "inw" || Name == "inl") &&
Operands.size() == 2) {
unsigned Reg;
if (Name[2] == 'b')
Reg = MatchRegisterName("al");
else if (Name[2] == 'w')
Reg = MatchRegisterName("ax");
else
Reg = MatchRegisterName("eax");
SMLoc Loc = Operands.back()->getEndLoc();
Operands.push_back(X86Operand::CreateReg(Reg, Loc, Loc));
}
// FIXME: Hack to handle "out[bwl]? %al, (%dx)" -> "outb %al, %dx".
if ((Name == "outb" || Name == "outw" || Name == "outl" || Name == "out") &&
Operands.size() == 3) {
@ -855,25 +839,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc,
NameLoc, NameLoc));
}
// The assembler accepts various amounts of brokenness for fnstsw.
if (Name == "fnstsw" || Name == "fnstsww") {
if (Operands.size() == 2 &&
static_cast<X86Operand*>(Operands[1])->isReg()) {
// "fnstsw al" and "fnstsw eax" -> "fnstw"
unsigned Reg = static_cast<X86Operand*>(Operands[1])->Reg.RegNo;
if (Reg == MatchRegisterName("eax") ||
Reg == MatchRegisterName("al")) {
delete Operands[1];
Operands.pop_back();
}
}
// "fnstw" -> "fnstw %ax"
if (Operands.size() == 1)
Operands.push_back(X86Operand::CreateReg(MatchRegisterName("ax"),
NameLoc, NameLoc));
}
// FIXME: Hack to handle recognize "aa[dm]" -> "aa[dm] $0xA".
if ((Name.startswith("aad") || Name.startswith("aam")) &&
Operands.size() == 1) {

7
lib/Target/X86/X86InstrInfo.td
View File

@ -1373,6 +1373,11 @@ def : InstAlias<"clrw $reg", (XOR16rr GR16:$reg, GR16:$reg)>;
def : InstAlias<"clrl $reg", (XOR32rr GR32:$reg, GR32:$reg)>;
def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>;
// We accepts "fnstsw %eax" even though it only writes %ax.
def : InstAlias<"fnstsw %eax", (FNSTSW8r)>;
def : InstAlias<"fnstsw %al" , (FNSTSW8r)>;
def : InstAlias<"fnstsw" , (FNSTSW8r)>;
// lcall and ljmp aliases. This seems to be an odd mapping in 64-bit mode, but
// this is compatible with what GAS does.
def : InstAlias<"lcall $seg, $off", (FARCALL32i i32imm:$off, i16imm:$seg)>;
@ -1393,7 +1398,7 @@ def : InstAlias<"inb %dx", (IN8rr)>;
def : InstAlias<"inw %dx", (IN16rr)>;
def : InstAlias<"inl %dx", (IN32rr)>;
def : InstAlias<"inb $port", (IN8ri i8imm:$port)>;
def : InstAlias<"inw $port", (IN16rir i8imm:$port)>;
def : InstAlias<"inw $port", (IN16ri i8imm:$port)>;
def : InstAlias<"inl $port", (IN32ri i8imm:$port)>;